本文選題：物理攻擊　切入點(diǎn)：物理自損　出處：《合肥工業(yè)大學(xué)》2017年碩士論文　論文類型：學(xué)位論文

【摘要】：集成電路芯片越來越多地成為重要信息的存儲(chǔ)載體,這些信息需要得到保護(hù);同時(shí),芯片內(nèi)部的電路結(jié)構(gòu)本身作為重要的知識(shí)產(chǎn)權(quán),也需要得到有效保護(hù)。技術(shù)的進(jìn)步使得針對(duì)芯片的各種物理攻擊成為可能,在此背景下硬件安全問題日益重要,關(guān)于硬件防護(hù)技術(shù)的研究也成為當(dāng)前的研究熱點(diǎn)。傳統(tǒng)的被動(dòng)式防護(hù)技術(shù)很難徹底的抵御攻擊者的攻擊,容易造成關(guān)鍵信息泄露;集成電路物理性自損防護(hù)技術(shù)是一種主動(dòng)防護(hù)技術(shù),通過自損終止攻擊行為,從而達(dá)到保護(hù)集成電路信息安全的目的,是目前最徹底、最有效的保護(hù)方法。針對(duì)改變芯片的工作溫度可以攻擊芯片,本論文研究一種抗溫度錯(cuò)誤注入攻擊的物理自損防護(hù)技術(shù)。論文首先介紹了現(xiàn)有的集成電路防護(hù)技術(shù),然后分析了集成電路物理攻擊的原理,最后基于TSMC 0.18μm CMOS工藝設(shè)計(jì)了物理自損防護(hù)電路,電路具有抗溫度錯(cuò)誤注入攻擊的功能,能夠?qū)崿F(xiàn)主動(dòng)防護(hù)。關(guān)鍵電路包括帶隙基準(zhǔn)電路、比較器電路、電荷泵電路。其中,帶隙基準(zhǔn)電路采用了高階溫度補(bǔ)償技術(shù)、調(diào)節(jié)型共源共柵結(jié)構(gòu),有效地降低了溫度系數(shù)和提高了電源電壓抑制比;比較器電路采用預(yù)放大可再生結(jié)構(gòu),有效提高了比較速度,減小了功耗;電荷泵電路采用交叉耦合級(jí)聯(lián)結(jié)構(gòu),PMOS管的襯底與源極相連接,有效減少了閾值電壓變化,提高了電荷傳輸效率。本文設(shè)計(jì)的抗溫度錯(cuò)誤注入攻擊能夠防御-40℃以下和120℃以上的攻擊。對(duì)設(shè)計(jì)的抗溫度錯(cuò)誤注入攻擊物理防護(hù)中的電路進(jìn)行仿真,帶隙基準(zhǔn)電壓源的溫度系數(shù)為13.94ppm/℃,電源電壓抑制比為59.17dB;比較器的大信號(hào)傳輸延遲為0.307ns;小信號(hào)傳輸延遲為0.403ns。電荷泵的輸出電壓為13.5V,紋波范圍為±1.18%。最后對(duì)所設(shè)計(jì)的物理自損防護(hù)電路進(jìn)行了整體仿真,仿真結(jié)果表明,在T=-41℃時(shí),建立時(shí)間為775ns;在T=121℃時(shí),建立時(shí)間為630ns,達(dá)到了在低溫和高溫?fù)p壞關(guān)鍵電路的目的。
[Abstract]:Integrated circuit chips are increasingly becoming storage carriers of important information that needs to be protected; at the same time, the circuit structure within the chip itself serves as an important intellectual property right. There is also a need for effective protection. Advances in technology have made possible various physical attacks on chips, and hardware security issues are becoming increasingly important in this context. The traditional passive protection technology is difficult to resist the attack of the attacker, and it is easy to cause the key information leak. Physical self-damage protection technology of integrated circuit is a kind of active protection technology. It is the most thorough at present to protect the information security of integrated circuit by stopping the attack behavior by self-damage. The most effective protection method. In order to change the working temperature of the chip can attack the chip, this paper studies a kind of physical self-damage protection technology against temperature error injection attack. Firstly, this paper introduces the existing integrated circuit protection technology. Then the principle of integrated circuit physical attack is analyzed. At last, based on TSMC 0.18 渭 m CMOS process, the physical self-loss protection circuit is designed. The circuit has the function of resisting temperature error injection attack, and can realize active protection. The key circuit includes the bandgap reference circuit. The comparator circuit and charge pump circuit, in which the bandgap reference circuit adopts high-order temperature compensation technology, regulates the common source common-gate structure, effectively reduces the temperature coefficient and improves the power supply voltage rejection ratio. The comparator circuit adopts preamplifying and renewable structure, which effectively improves the comparison speed and reduces the power consumption, and the charge pump circuit uses the cross-coupled cascade structure to connect the substrate of PMOS transistor to the source pole, which effectively reduces the threshold voltage variation. The designed anti-temperature error injection attack can defend against the attack below -40 鈩，

本文編號(hào)：1570654