本文選題：SOPC + FPGA��； 參考：《中國(guó)科學(xué)院大學(xué)(中國(guó)科學(xué)院工程管理與信息技術(shù)學(xué)院)》2017年碩士論文

【摘要】：數(shù)據(jù)采集系統(tǒng)發(fā)展到現(xiàn)今,高速采集、高速傳輸、并行處理、實(shí)時(shí)分析已成為新的發(fā)展趨勢(shì)。在實(shí)際應(yīng)對(duì)某SPARC V8架構(gòu)CPU的可靠性測(cè)試任務(wù)中,被采樣信號(hào)數(shù)量多、頻率高,經(jīng)高速采樣后,會(huì)產(chǎn)生大量的原始數(shù)據(jù),這對(duì)數(shù)據(jù)采集系統(tǒng)的采樣率、數(shù)據(jù)處理能力、數(shù)據(jù)傳輸帶寬提出了新的挑戰(zhàn)與要求。此時(shí),傳統(tǒng)的數(shù)據(jù)采集設(shè)計(jì)方法與技術(shù)已經(jīng)很難滿足這種高性能、高速、實(shí)時(shí)、并行處理的要求,因此需開發(fā)一種新型的高速數(shù)據(jù)采集系統(tǒng)來(lái)應(yīng)對(duì)新的挑戰(zhàn)。為了解決上述難題,本文提出了新的解決方案,即在傳統(tǒng)的設(shè)計(jì)方法上引入了更為先進(jìn)的設(shè)計(jì)思想和技術(shù):FPGA(Field Programmable Gate Array)技術(shù)、PCI Express總線技術(shù)、SOPC(System on a Programmable Chip)技術(shù)。將FPGA引入數(shù)據(jù)采集系統(tǒng)可以增加系統(tǒng)設(shè)計(jì)的靈活性和穩(wěn)定性;PCI Express總線作為現(xiàn)今最先進(jìn)的計(jì)算機(jī)總線技術(shù),可以最大化的增加系統(tǒng)數(shù)據(jù)傳輸帶寬。將SOPC技術(shù)引入數(shù)據(jù)采集系統(tǒng)則可以簡(jiǎn)化電路設(shè)計(jì),增加后期系統(tǒng)可移植性和維護(hù)性,并增強(qiáng)與系統(tǒng)之間的人機(jī)交互性。因此本文將著重討論三種技術(shù)的特點(diǎn)及在高數(shù)數(shù)據(jù)采集系統(tǒng)中的應(yīng)用方法。其中將詳細(xì)闡述系統(tǒng)核心元器件選型的原則,硬件電路的設(shè)計(jì)原理,PCI Express總線物理層的主流實(shí)現(xiàn)方法及優(yōu)缺點(diǎn),DDR3高數(shù)緩存的應(yīng)用方法,以及實(shí)際電路設(shè)計(jì)中高速PCB的設(shè)計(jì)原則與方法,以及高速信號(hào)的信號(hào)完整性分析與仿真方法等。最后針對(duì)SOPC開發(fā)的環(huán)節(jié),介紹IP核(Intellectual Property Core)的移植和重用,多核協(xié)同處理的方法,從硬件到軟件對(duì)新型數(shù)據(jù)采集系統(tǒng)整體做一個(gè)詳細(xì)的分析與設(shè)計(jì)。通過(guò)本文的分析與設(shè)計(jì),希望可以將三種先進(jìn)的技術(shù)融合到新型高數(shù)數(shù)據(jù)采集系統(tǒng)當(dāng)中,真正實(shí)現(xiàn)采集系統(tǒng)在信號(hào)采樣率、數(shù)據(jù)處理能力、數(shù)據(jù)傳輸帶寬等性能提升的同時(shí),同步增強(qiáng)系統(tǒng)設(shè)計(jì)的簡(jiǎn)便性,靈活性、可移植性、電路穩(wěn)定性,同時(shí)還具有操作簡(jiǎn)捷明了,良好的人機(jī)交互界面等優(yōu)點(diǎn)。在大數(shù)據(jù)時(shí)代的今天,基于SOPC、FPGA、PCI-E技術(shù)的高速數(shù)據(jù)采集系統(tǒng)將具有更廣泛的應(yīng)用,對(duì)工業(yè)4.0的發(fā)展及人工智能的進(jìn)步具有重要的意義。
[Abstract]:With the development of data acquisition system, high speed acquisition, high speed transmission, parallel processing and real-time analysis have become a new trend. In the testing task of reliability of a SPARC V8 architecture CPU, the number of sampled signals is large and the frequency is high. After high speed sampling, a large amount of raw data will be produced, which is the sampling rate and data processing ability of the data acquisition system. Data transmission bandwidth presents new challenges and requirements. At this time, the traditional data acquisition design method and technology have been difficult to meet the requirements of high performance, high speed, real time, parallel processing, so it is necessary to develop a new high speed data acquisition system to meet the new challenges. In order to solve the above problems, a new solution is proposed in this paper, that is, the more advanced design idea and technology are introduced into the traditional design method. The Array (Field Programmable Gate Array) technology and the PCI Express bus technology (system on a Programmable Chip) are introduced. Introducing FPGA into the data acquisition system can increase the flexibility and stability of the system design. PCI Express bus is the most advanced computer bus technology, which can maximize the data transmission bandwidth of the system. The introduction of SOPC technology into the data acquisition system can simplify the circuit design, increase the portability and maintainability of the later stage system, and enhance the man-machine interaction with the system. Therefore, this paper will focus on the characteristics of the three technologies and the application method in the high number data acquisition system. The principle of selecting the core components of the system, the design principle of hardware circuit, the mainstream realization method of PCI Express bus physical layer and the application method of DDR3 high number cache are described in detail. The design principle and method of high speed PCB in practical circuit design, signal integrity analysis and simulation method of high speed signal are also discussed. Finally, aiming at the development of SOPC, this paper introduces the transplantation and reuse of IP core and the method of multi-core cooperative processing, and makes a detailed analysis and design of the new data acquisition system from hardware to software. Through the analysis and design of this paper, it is hoped that the three advanced technologies can be integrated into the new high number data acquisition system, so as to improve the signal sampling rate, data processing capability, data transmission bandwidth and so on. Synchronous enhancement system design is simple, flexible, portability, circuit stability, but also has the advantages of simple and clear operation, good man-machine interface and so on. In the era of big data, the high-speed data acquisition system based on SOPC-FPGA PCI-E technology will be more widely used, which is of great significance to the development of industry 4.0 and the progress of artificial intelligence.
【學(xué)位授予單位】：中國(guó)科學(xué)院大學(xué)(中國(guó)科學(xué)院工程管理與信息技術(shù)學(xué)院)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類號(hào)】：TP274.2

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