本文選題：MIMO + 雷達(dá)　； 參考：《南京理工大學(xué)》2017年碩士論文

【摘要】：近年來(lái),多輸入多輸出(Multiple Input Multiple Output,MIMO)雷達(dá)作為一種新體制雷達(dá)越來(lái)越受到人們的關(guān)注。與常規(guī)體制雷達(dá)不同,MIMO雷達(dá)具有多個(gè)發(fā)射單元和多個(gè)接收單元,可獲得遠(yuǎn)大于物理陣元數(shù)的虛擬陣元,從而有效提高雷達(dá)接收孔徑,提高雷達(dá)測(cè)角精度。本文圍繞MIMO雷達(dá)信號(hào)產(chǎn)生與數(shù)據(jù)采集進(jìn)行研究。本文基于集中式MIMO體制線(xiàn)陣?yán)走_(dá),給出了一種基于FPGA的MIMO雷達(dá)正交信號(hào)產(chǎn)生、采集與傳輸系統(tǒng)的設(shè)計(jì)與實(shí)現(xiàn)方案。首先確立了系統(tǒng)的結(jié)構(gòu)組成,系統(tǒng)主要由信號(hào)的產(chǎn)生、信號(hào)的采集、數(shù)據(jù)的預(yù)處理、PCIe數(shù)據(jù)傳輸?shù)裙δ苣K構(gòu)成。根據(jù)參數(shù)指標(biāo),分別設(shè)計(jì)每個(gè)模塊的結(jié)構(gòu)組成,闡述其工作原理。接著根據(jù)MIMO雷達(dá)發(fā)射波形特性,生成一組滿(mǎn)足系統(tǒng)參數(shù)要求的正交信號(hào)。然后結(jié)合硬件平臺(tái)對(duì)各功能模塊進(jìn)行軟件編程,程序由VerilogHDL編寫(xiě)完成。最后對(duì)系統(tǒng)各模塊進(jìn)行調(diào)試和驗(yàn)證,確定系統(tǒng)各部分工作正常后,開(kāi)展實(shí)驗(yàn)驗(yàn)證系統(tǒng)的整體功能,采集回波信號(hào)并進(jìn)行分析處理,解析出目標(biāo)的距離、速度和方位信息。
[Abstract]:In recent years, as a new type of radar, multiple Input Multiple output Mimo (MIMO) radar has attracted more and more attention. Different from conventional radar, MIMO radar has many transmitting units and multiple receiving units, which can obtain virtual array elements which are far larger than the number of physical elements, which can effectively improve radar receiving aperture and radar angle measurement accuracy. This paper focuses on MIMO radar signal generation and data acquisition. Based on centralized MIMO linear array radar, this paper presents a design and implementation scheme of orthogonal signal generation, acquisition and transmission system for MIMO radar based on FPGA. Firstly, the structure of the system is established. The system is mainly composed of signal generation, signal acquisition, data preprocessing and PCIe data transmission. According to the parameter index, the structure of each module is designed, and its working principle is expounded. Then according to the waveform characteristics of MIMO radar, a set of orthogonal signals which meet the requirements of system parameters are generated. Then combined with the hardware platform for software programming of each functional module, the program is completed by VerilogHDL. Finally, every module of the system is debugged and verified. After the system works normally, the whole function of the system is verified, the echo signal is collected and analyzed, and the distance, velocity and azimuth information of the target are analyzed.
【學(xué)位授予單位】：南京理工大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類(lèi)號(hào)】：TN957.51

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