本文選題：視頻監(jiān)控 + HD-SDI��； 參考：《杭州電子科技大學(xué)》2017年碩士論文

【摘要】：海洋中蘊(yùn)藏著豐富的資源,隨著陸地不可再生資源的日益枯竭,各國加大了對海洋資源的開發(fā)。海洋資源的巨大開發(fā)價值促進(jìn)了海洋探測設(shè)備的不斷發(fā)展,高清視頻監(jiān)控是海洋探測設(shè)備的重要組成部分。通過高清視頻監(jiān)控能夠更清晰地了解水下世界,從而推動深海養(yǎng)殖、海底作業(yè)、海底資源開發(fā)等產(chǎn)業(yè)領(lǐng)域的快速發(fā)展。鑒于海洋環(huán)境的復(fù)雜性,迫切需要一種圖像分辨率高(如720P/1080P)、傳輸距離遠(yuǎn)、實時性好、抗干擾能力強(qiáng)的海洋視頻監(jiān)控系統(tǒng)。本文將整個系統(tǒng)分為甲板接收系統(tǒng)和水下發(fā)送系統(tǒng)兩部分。水下發(fā)送系統(tǒng)主要負(fù)責(zé)視頻數(shù)據(jù)、傳感器數(shù)據(jù)的采集,并完成數(shù)據(jù)的復(fù)用,然后通過光纖將數(shù)據(jù)發(fā)送到甲板接收系統(tǒng);同時完成反向控制數(shù)據(jù)的解復(fù)用。甲板接收系統(tǒng)主要負(fù)責(zé)接收數(shù)據(jù)并進(jìn)行解復(fù)用,將視頻數(shù)據(jù)和傳感器數(shù)據(jù)解封裝,并將接收到的視頻數(shù)據(jù)輸出至監(jiān)視器;同時將反向控制數(shù)據(jù)復(fù)用傳輸至水下系統(tǒng)。本文首先通過分析目前的需求和技術(shù)狀況,論證了水下高清光端機(jī)的研究價值。然后介紹了水下雙路SDI高清光端機(jī)的相關(guān)原理和系統(tǒng)結(jié)構(gòu),提出了一種水下雙路SDI(Serial Digital Interface)高清視頻光端機(jī)的研制方案,并詳細(xì)介紹了系統(tǒng)硬件設(shè)計和FPGA邏輯設(shè)計。系統(tǒng)硬件設(shè)計以Xilinx公司的Kintex-7系列的FPGA為主控芯片;以HD-SDI均衡/驅(qū)動電路保證HD-SDI信號的正確傳輸;利用時鐘電路配置系統(tǒng)所需的時鐘;采用串口收發(fā)電路實現(xiàn)傳感器數(shù)據(jù)與控制信號的接收與發(fā)送;利用SFP+光模塊電路完成光-電信號的轉(zhuǎn)換。FPGA的邏輯設(shè)計以Verilog為開發(fā)語言,利用GTX收發(fā)器及SMPTE SD/HD/3G-SDI IP核完成HD-SDI信號的接收和發(fā)送;設(shè)計復(fù)位模塊避免系統(tǒng)進(jìn)入亞穩(wěn)態(tài)狀態(tài);設(shè)計HD-SDI視頻同步模塊保證視頻有效數(shù)據(jù)的完整性;設(shè)計HD-SDI視頻時序信息提取模塊來保證視頻時序和視頻數(shù)據(jù)對齊;利用數(shù)據(jù)的封裝及解封裝模塊完成多路數(shù)據(jù)的同時傳輸;利用comma字符控制模塊及數(shù)據(jù)對齊模塊保證數(shù)據(jù)在接收端和發(fā)送端順序的一致性。其中FPGA邏輯設(shè)計的重點及難點在于GTX收發(fā)器的設(shè)計、HD-SDI視頻相關(guān)模塊的設(shè)計、數(shù)據(jù)的封裝及解封裝的設(shè)計等。最后,論文描述了整個系統(tǒng)的調(diào)試過程及結(jié)果。包括HD-SDI接收/發(fā)送模塊的測試、誤碼率的測試、傳輸實時性測試、彩條測試以及視頻測試,最終實現(xiàn)了2路幀率為25fps、分辨率為1080P的SDI高清視頻和8路業(yè)務(wù)數(shù)據(jù)的實時傳輸。通過測試表明本文研制的水下雙路SDI高清視頻光端機(jī)具有分辨率高、傳輸距離遠(yuǎn)、實時性好等特點。
[Abstract]:There are abundant resources in the ocean. With the depletion of non-renewable land resources, countries have increased the exploitation of marine resources. The great exploitation value of marine resources has promoted the continuous development of marine exploration equipment. High-definition video surveillance is an important part of marine exploration equipment. Through high-definition video surveillance, the underwater world can be more clearly understood, thus promoting the rapid development of deep-sea aquaculture, undersea operations, submarine resource development and other industries. In view of the complexity of marine environment, there is an urgent need for a marine video surveillance system with high image resolution (such as 720p / 1080PU, long transmission distance, good real-time performance and strong anti-jamming ability). The whole system is divided into two parts: deck receiving system and underwater sending system. The underwater transmission system is mainly responsible for the collection of video data and sensor data, and the multiplexing of the data, and then transmits the data to the deck receiving system through optical fiber. At the same time, the demultiplexing of the reverse control data is completed. The deck receiving system is mainly responsible for receiving data and demultiplexing, unencapsulating video data and sensor data, outputting received video data to monitor, and multiplexing the reverse control data to underwater system. In this paper, the research value of underwater high-definition optical terminal is demonstrated by analyzing the current demand and technical situation. Then, this paper introduces the principle and system structure of underwater dual-channel SDI high-definition optical machine, puts forward a design scheme of underwater dual-channel SDI(Serial Digital interface high-definition video optical terminal, and introduces in detail the hardware design and FPGA logic design of the system. The hardware of the system is designed with the FPGA of Kintex-7 series of Xilinx as the main control chip, the HD-SDI equalization / drive circuit to ensure the correct transmission of HD-SDI signal, and the clock of the system to be configured by the clock circuit. The serial transceiver circuit is used to realize the receiving and transmitting of sensor data and control signal, and the SFP optical module circuit is used to complete the logic design of optical-electric signal conversion. Verilog is used as the development language. GTX transceiver and SMPTE SD/HD/3G-SDI IP core are used to receive and transmit HD-SDI signal; reset module is designed to avoid the system from entering metastable state; HD-SDI video synchronization module is designed to ensure the integrity of effective video data. HD-SDI video timing information extraction module is designed to ensure video timing and video data alignment, using data encapsulation and unencapsulation module to complete multi-channel data transmission at the same time. The comma character control module and the data alignment module are used to ensure the consistency of the data sequence between the receiver and the sender. The key and difficulty of FPGA logic design is the design of GTX transceiver and the design of HD-SDI video module, data encapsulation and unencapsulation. Finally, the paper describes the debugging process and results of the whole system. Including HD-SDI receiving / transmitting module test, bit error rate test, transmission real-time test, color bar test and video test, 2 channels of real-time transmission of SDI high-definition video with frame rate of 25fps, resolution of 1080p and 8 channels of service data are finally realized. The test results show that the underwater dual-channel SDI high-definition video optical terminal has the advantages of high resolution, long transmission distance and good real-time performance.
【學(xué)位授予單位】：杭州電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2017
【分類號】：TN948.6

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