基于DSP的視頻跟蹤器的設(shè)計(jì)與研究
[Abstract]:With the development of social economy and the improvement of people's living standard, public safety has become the focus of the society. The main function of the video tracking system is to process the video image and to realize the recognition and tracking of moving objects. Video image processing can be divided into four parts: video capture, video preprocessing, video superposition and video target tracking. Tracking is based on recognition, because the target is different, so the tracking methods are very different, such as correlation tracking, field of view tracking, edge tracking and so on. Because the signal of video tracking processing is real time video digital image signal, it has two main characteristics: one is massive data, the other is that it needs fast processing speed. With the improvement of integration and operation speed of digital signal processor (DSP), real-time image transmission and high speed processing need to be guaranteed technically, which makes DSP chip widely used in video tracking system. Aiming at the characteristics of mass data, high processing speed and real-time tracking of video tracking system, this paper completes the design of video tracking system based on DSP combined with the existing technology and current advanced devices. The system chooses TMS320C6416 of TI Company as the core device to realize the recognition and tracking of the target image in the field of view, and gives the target position information in real time, and selects the EP1C6Q240C8 of the ALTERA Company as the auxiliary processor, which is responsible for the collection of the video image. Preprocessing and video overlay display, and timing logic control between DSP and FPGA. This paper proposes a fast median filter algorithm based on hardware, which solves the shortcomings of traditional median filtering algorithm, such as poor real-time performance and high resource occupancy rate, and meets the real-time needs of the system. Using M4k RAM resource in FPGA to construct high speed FIFO, the rate matching between DSP and FPGA is completed, and the buffer loading of video data from FPGA to DSP is realized by using EDMA transmission mechanism of system DSP. The debugging results show that the system has a certain real-time and stability.
【學(xué)位授予單位】:蘭州交通大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2016
【分類號(hào)】:TP391.41
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