本文選題：電子穩(wěn)像 + 平移運(yùn)動(dòng)估計(jì)��； 參考：《哈爾濱工業(yè)大學(xué)》2017年碩士論文

【摘要】：電子穩(wěn)像依托于數(shù)字圖像處理技術(shù)來(lái)實(shí)現(xiàn)對(duì)視頻序列的去抖,以提高畫面的質(zhì)量。該技術(shù)使用數(shù)字處理器來(lái)完成圖像的穩(wěn)定,可以充分利用現(xiàn)代大規(guī)模以及超過(guò)規(guī)模集成電路的優(yōu)勢(shì)將穩(wěn)像系統(tǒng)小型化和低功耗化。由于圖像數(shù)據(jù)量比較大,因此在計(jì)算時(shí)也就會(huì)消耗很多的時(shí)間,算法的計(jì)算速度和復(fù)雜度應(yīng)該被著重考慮。本文從電子穩(wěn)像系統(tǒng)中圖像運(yùn)動(dòng)參數(shù)估計(jì)精度、算法計(jì)算復(fù)雜度以及在嵌入式平臺(tái)現(xiàn)場(chǎng)可編程門陣列(Field-Programmable Gate Array,FPGA)上實(shí)現(xiàn)為主要考慮點(diǎn)進(jìn)行研究。本文首先介紹了電子穩(wěn)像系統(tǒng)的基本原理,將圖像的運(yùn)動(dòng)分為平移運(yùn)動(dòng)和旋轉(zhuǎn)運(yùn)動(dòng)分別進(jìn)行研究。在圖像平移運(yùn)動(dòng)參數(shù)估計(jì)中,本文通過(guò)實(shí)驗(yàn)分析了代表點(diǎn)匹配法、位平面法、灰度投影法和相位相關(guān)法的優(yōu)缺點(diǎn),這些方法在參數(shù)估計(jì)精度、計(jì)算時(shí)間復(fù)雜度和抗干擾性方面無(wú)法同時(shí)得到很好的結(jié)果。本文對(duì)塊匹配法進(jìn)行優(yōu)化,使其保留了參數(shù)估計(jì)精度高和抗小幅度旋轉(zhuǎn)優(yōu)勢(shì)的同時(shí)極大降低了運(yùn)算量。其次,針對(duì)圖像復(fù)合運(yùn)動(dòng)參數(shù)估計(jì)對(duì)圓投影進(jìn)行擴(kuò)展得到基于模板濾波的圓環(huán)投影算法。當(dāng)圖像的運(yùn)動(dòng)包含旋轉(zhuǎn)時(shí)使其像素相對(duì)位置發(fā)生了變化,文中選擇了具有旋轉(zhuǎn)不變特性的灰度直方圖和極坐標(biāo)投影進(jìn)行了實(shí)驗(yàn)分析,并將圓投影進(jìn)行了擴(kuò)展得到基于模板濾波的圓環(huán)投影算法。該方法具有旋轉(zhuǎn)不變特性,而且計(jì)算時(shí)間復(fù)雜度也比前兩種方法大幅度下降。最后,本文設(shè)計(jì)并實(shí)現(xiàn)了電子穩(wěn)像硬件系統(tǒng)。硬件系統(tǒng)包含攝像機(jī)、圖像采集卡和顯示器。文中對(duì)圖像采集卡電路設(shè)計(jì)和Verilog程序設(shè)計(jì)進(jìn)行了詳細(xì)的介紹,在FPGA上實(shí)現(xiàn)了SDI數(shù)據(jù)流解析、SSRAM讀寫控制、圖像運(yùn)動(dòng)參數(shù)估計(jì)、圖像運(yùn)動(dòng)參數(shù)濾波等功能模塊,并驗(yàn)證了各模塊的正確性。在實(shí)際測(cè)試中,該電子穩(wěn)像硬件系統(tǒng)可以實(shí)現(xiàn)對(duì)分辨率為1080p,幀率為30fps的視頻進(jìn)行實(shí)時(shí)穩(wěn)像。
[Abstract]:Electronic image stabilization is based on digital image processing technology to achieve video sequence shake, in order to improve the quality of the picture. The digital processor is used to stabilize the image, which can make full use of the advantages of modern large-scale and larger integrated circuits to miniaturize and reduce the power consumption of the image stabilization system. Because of the large amount of image data, the computational speed and complexity of the algorithm should be considered. In this paper, the estimation accuracy of image motion parameters, the computational complexity of the algorithm and the implementation on the field programmable gate array (Field-Programmable Gate ArrayFPGA) of an embedded platform are studied. In this paper, the basic principle of electronic image stabilization system is introduced, and the motion of image is divided into translation motion and rotation motion. In this paper, the advantages and disadvantages of the representative point matching method, bit plane method, gray projection method and phase correlation method are analyzed through experiments. The computational time complexity and anti-interference can not get good results at the same time. In this paper, the block matching method is optimized to keep the high precision of parameter estimation and the advantage of anti-rotation of small amplitude, at the same time greatly reducing the computational complexity. Secondly, the circular projection algorithm based on template filter is obtained by extending the circular projection based on image composite motion parameter estimation. When the motion of the image includes rotation, the relative position of the pixel changes. In this paper, the gray histogram and polar projection with rotation invariant property are selected for experimental analysis. The circular projection algorithm based on template filter is obtained by extending the circular projection. The method has the property of rotation invariance, and the computational time complexity is much lower than that of the former two methods. Finally, the hardware system of electronic image stabilization is designed and implemented. The hardware system includes a camera, an image capture card and a display. In this paper, the circuit design and Verilog program design of image acquisition card are introduced in detail. The function modules of SDI data stream parsing and reading and writing control, image motion parameter estimation, image motion parameter filtering and so on are implemented on FPGA. The correctness of each module is verified. In the actual test, the electronic image stabilization hardware system can achieve real-time image stabilization for video with a resolution of 1080p and frame rate of 30fps.
【學(xué)位授予單位】：哈爾濱工業(yè)大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類號(hào)】：TP391.41

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本文編號(hào)：1840424