驅(qū)控一體化多軸運(yùn)動(dòng)控制器的研究
[Abstract]:Motion control and servo drive system are widely used in various fields of modern mechanical manufacturing industry and are the core of industrial automation. The development of motion control and servo drive system is of great significance to the national economy. At present, most multi-axis motion systems, such as industrial robots and CNC machine tools, still adopt the distributed control mode of one motion controller and multiple servo drivers. In practical applications, the hardware redundancy of the system is high, and the signal transmission is easily interfered. And expensive problems, it is necessary to further simplify the structure of the control drive system. Aiming at the development of multi-axis motion controller integrated with drive and control, this paper studies the design of related hardware structure, the realization of motor vector control, the realization of related IP core in FPGA and the development of motor control program. In this paper, a hardware design scheme which supports Ethernet communication and can control and drive multiple permanent magnet synchronous motors simultaneously is proposed. This scheme uses a chip with the function of hardware TCP/IP protocol stack for Ethernet interconnection. DSP is used for data transceiver and position loop calculation. The collection of current and position feedback and motor control are realized by FPGA. The three-phase inverter function is realized in the power part with the intelligent power module IPM as the core. The necessity of realizing vector control algorithm on FPGA is discussed. The mathematical model of permanent magnet synchronous motor is analyzed and the motor control and SVPWM algorithm are introduced. On this basis, the vector control module is built in Matlab/DSP Builder environment. The corresponding communication interface module for absolute photoelectric encoder communication and SPI communication of current-sampled ADC is developed, and the principle of PWM waveform generation is analyzed. The corresponding IP core is compiled and simulated under ModelSim. Finally, the related IP and Nios II are integrated into SoPC system in FPGA, and several PMSM control programs and interrupt programs are written, and the program is optimized for embedded system. The related test platform is built and the feasibility and effectiveness of the system are verified by the analysis of the running time of the system and the experiments of the motor current loop and the speed loop.
【學(xué)位授予單位】:上海交通大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2015
【分類號(hào)】:TM301.2
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