發(fā)布時(shí)間：2018-03-24 05:25

  本文選題：交通系統(tǒng)　切入點(diǎn)：現(xiàn)場(chǎng)可編程門陣列　出處：《實(shí)驗(yàn)室研究與探索》2017年03期

【摘要】：針對(duì)當(dāng)前道路車輛逐漸增多,固定配時(shí)方案的交通信號(hào)系統(tǒng)無法滿足復(fù)雜車流變化的情況。提出將感應(yīng)控制方式融入到交通信號(hào)系統(tǒng)中,并與定時(shí)配置方案相結(jié)合,采用FPGA技術(shù)設(shè)計(jì)一種自適應(yīng)的交通控制系統(tǒng)。通過Verilog語言編寫各模塊的控制程序,在QuartusⅡ軟件環(huán)境下進(jìn)行綜合編譯與仿真驗(yàn)證,設(shè)計(jì)出能夠采集路口車流信息并實(shí)時(shí)反饋、自動(dòng)調(diào)整配時(shí)方案的交通信號(hào)控制系統(tǒng)。然后,結(jié)合開發(fā)板模塊電路,選擇合適的電子器件,設(shè)計(jì)車流檢測(cè)和交通信號(hào)模擬顯示電路,并通過管腳約束的方式,完成外接模擬顯示電路與開發(fā)板的硬件連接,下載程序并調(diào)試運(yùn)行。最終,在實(shí)驗(yàn)室完成自適應(yīng)交通信號(hào)系統(tǒng)的硬件電路調(diào)試。
[Abstract]:In view of the increasing number of road vehicles and the fact that the traffic signal system with fixed timing scheme can not meet the complex traffic flow changes, the inductive control mode is integrated into the traffic signal system and combined with the timing configuration scheme. An adaptive traffic control system is designed by using FPGA technology. The control program of each module is compiled by Verilog language, compiled and simulated under the environment of Quartus 鈪，

本文編號(hào)：1656905