本文選題：衛(wèi)星導航接收機 + LEON�。� 參考：《電訊技術(shù)》2016年06期

【摘要】：為了提高衛(wèi)星導航接收機的工作性能以及小型化設(shè)計,在現(xiàn)場可編程門陣列(FPGA)平臺上開發(fā)一款基于LEON3開源軟核的擁有自主知識產(chǎn)權(quán)的衛(wèi)星導航接收機。通過LEON3開源軟核架構(gòu)和自主設(shè)計的分段匹配濾波器(PMF)與快速傅里葉變換(FFT)相結(jié)合的捕獲模塊、基于延遲鎖定環(huán)的碼跟蹤環(huán)路和基于科斯塔斯環(huán)的載波跟蹤環(huán)路相結(jié)合的跟蹤模塊IP核實現(xiàn)衛(wèi)星導航接收機的基帶系統(tǒng)級芯片(So C)設(shè)計,最后完成接收機系統(tǒng)的軟件設(shè)計并在DE2-115 FPGA平臺上對接收機系統(tǒng)進行驗證測試。實驗結(jié)果表明所設(shè)計的接收機性能優(yōu)良,能夠正常捕獲并且跟蹤到衛(wèi)星信號,定位結(jié)果顯示正常,誤差在3 m左右。擁有完全的硬件軟件源代碼以及優(yōu)良的性能使得所設(shè)計的接收機對國內(nèi)導航的發(fā)展有著重要意義。
[Abstract]:In order to improve the performance and miniaturization design of the satellite navigation receiver, a satellite navigation receiver with independent intellectual property rights based on LEON3 open source soft core is developed on the field programmable gate array (FPGA) platform. Through LEON3 open source soft core architecture and self-designed piecewise matched filter (PMF) combined with fast Fourier transform (FFT) acquisition module, The design of base-band system-level chip (SoC) of satellite navigation receiver is realized by IP core of code tracking loop based on delay locking loop and carrier tracking loop based on Kostas loop. Finally, the software design of the receiver system is completed and the receiver system is verified and tested on the platform of DE2-115 FPGA. The experimental results show that the designed receiver has good performance and can capture and track the satellite signal normally. The positioning results show normal and the error is about 3 m. With complete hardware and software source code and excellent performance, the designed receiver is of great significance for the development of domestic navigation.
【作者單位】： 廣東工業(yè)大學信息工程學院;珠海全志科技有限公司;
【基金】：廣東省科技計劃項目(2013B010401026)~~
【分類號】：TN965.5
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本文編號：2071853