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基于指紋和冗余布線的版圖數(shù)字水印方法研究與實現(xiàn)

發(fā)布時間:2018-04-22 04:28

  本文選題:IPP + 版圖數(shù)字水印; 參考:《國防科學(xué)技術(shù)大學(xué)》2013年碩士論文


【摘要】:半導(dǎo)體制造工藝技術(shù)的進(jìn)步已使得在芯片上集成大量的晶體管組成一個高性能的片上系統(tǒng)成為可能。雖然IP復(fù)用有效減少了SOC設(shè)計成本和TAT(設(shè)計周期),但也暴露了安全風(fēng)險,因此,IPP(知識產(chǎn)權(quán)保護(hù))技術(shù)引起了業(yè)界的關(guān)注。 近年來,數(shù)字水印技術(shù)已經(jīng)成為一種有效的IPP方法,從國際上已有的一些芯片數(shù)字水印研究上來看,集成電路芯片數(shù)字水印技術(shù)已在電路設(shè)計的各個抽象層次上做了探索性的研究,并取得了初步成果。但要將數(shù)字水印技術(shù)實際應(yīng)用于具體的工程中還有很多技術(shù)難題。本文結(jié)合集成電路版圖布局布線技術(shù),深入研究芯片數(shù)字水印插入和提取算法,提出了解決芯片版權(quán)保護(hù)的新思路和新方法——基于指紋和冗余布線的版圖數(shù)字水印方法。主要研究有: 分析集成電路布局布線算法和特性,提出了基于指紋和冗余布線的版圖數(shù)字水印方法。 研究并實現(xiàn)了基于指紋和冗余布線的版圖水印嵌入算法。 研究并實現(xiàn)了基于指紋和冗余布線的版圖水印提取算法。 文中提出的版圖數(shù)字水印方法主要包括水印生成、水印嵌入和水印提取三部分。水印生成過程中主要應(yīng)用了RSA密碼算法對版權(quán)信息進(jìn)行加密生成待嵌水印,增加水印的隱蔽性。在水印嵌入過程中,本文基于指紋編碼和冗余布線的算法,,借助布局布線工具和腳本語言在芯片物理設(shè)計階段高效地將水印生成后的待嵌水印嵌入到選定的水印載體層中,水印嵌入后將水印載體線物理位置信息保存,作為水印提取算法的輸入。在水印提取的過程中,根據(jù)保存的水印載體線物理位置信息,通過照片定位、一致性比對找出水印載體線在芯片解剖照片中的像素位置,然后應(yīng)用圖像增強算法、區(qū)域生長算法等從定位的照片中將水印載體線信息提取出來組合成待驗水印,最后用水印生成過程產(chǎn)生的公鑰對待驗水印解密驗證。 本文通過實驗分析了基于指紋和冗余布線的版圖水印方法的可靠性、高效性以及方法對芯片性能的影響。實驗結(jié)果表明,基于指紋和冗余布線的版圖數(shù)字水印方法能成功將版權(quán)水印信息嵌入到版圖中,并能準(zhǔn)確地從解剖照片中提取出水印信息,對芯片性能幾乎沒有影響,也不會帶來額外的面積成本,是一種具有高可靠性以及低開銷的水印方法。
[Abstract]:Advances in semiconductor manufacturing technology have made it possible to integrate a large number of transistors on a chip to form a high-performance on-chip system. Although IP reuse can effectively reduce the design cost and tat (Design cycle) of SOC, it also exposes the security risk, so IP IP (intellectual property Protection) technology has attracted the attention of the industry. In recent years, digital watermarking technology has become an effective IPP method. The digital watermarking technology of integrated circuit chip has been studied in various abstract levels of circuit design, and some preliminary results have been obtained. However, there are still a lot of technical problems to apply digital watermarking technology to concrete projects. Based on the integrated circuit layout and routing technology, this paper deeply studies the chip digital watermark insertion and extraction algorithm, and puts forward a new idea and method to solve the chip copyright protection, which is based on fingerprint and redundant layout digital watermarking method. The main studies are: This paper analyzes the algorithm and characteristics of integrated circuit layout and routing, and proposes a digital watermarking method for layout based on fingerprint and redundant routing. A layout watermarking embedding algorithm based on fingerprint and redundant routing is studied and implemented. This paper studies and implements a watermark extraction algorithm based on fingerprint and redundant routing. The digital watermarking method proposed in this paper mainly includes three parts: watermark generation, watermark embedding and watermark extraction. In the process of watermark generation, the RSA cryptographic algorithm is mainly used to encrypt the copyright information to generate the watermark to be embedded, so as to increase the concealment of the watermark. In the process of watermark embedding, based on the algorithm of fingerprint coding and redundant routing, the watermark is embedded into the selected watermark carrier layer efficiently in the physical design phase of the chip with the help of layout and routing tools and script language. After the watermark is embedded, the physical position information of the watermark carrier line is saved as the input of the watermark extraction algorithm. In the process of watermark extraction, according to the physical position information of the watermark carrier line, the pixel position of the watermark carrier line in the chip anatomical photo is found through the photo location and consistency comparison, and then the image enhancement algorithm is applied. The region growth algorithm extracts the watermark carrier line information from the location photo and combines it into a watermark to be verified. Finally, the public key generated by the watermark generation process is used to verify the decryption of the watermark. In this paper, the reliability, efficiency and the effect of the method on chip performance are analyzed by experiments. The experimental results show that the digital watermarking method based on fingerprint and redundant wiring can successfully embed the copyright watermark information into the layout and extract the watermark information from the anatomical photos accurately, which has little effect on the performance of the chip. It is a high reliability and low cost watermarking method.
【學(xué)位授予單位】:國防科學(xué)技術(shù)大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2013
【分類號】:TP309.7

【參考文獻(xiàn)】

相關(guān)期刊論文 前3條

1 李東曉;鄭偉;張明;;IP芯核水印技術(shù)研究進(jìn)展[J];電路與系統(tǒng)學(xué)報;2007年04期

2 夏需堂;吳海濱;陳新兵;周德玉;周后偉;張鐵譯;;基于OTSU的近紅外圖像分割的應(yīng)用研究[J];大氣與環(huán)境光學(xué)學(xué)報;2011年06期

3 邢強;駱麗;;集成電路設(shè)計中IP核的保護(hù)措施[J];中國集成電路;2006年06期



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