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基于CMOS工藝的光接收機系統(tǒng)設計

發(fā)布時間:2018-02-23 22:01

  本文關鍵詞: 光纖通信 光接收機 跨阻放大器 可靠性 出處:《西安電子科技大學》2014年碩士論文 論文類型:學位論文


【摘要】:近年來,用于信息傳遞的各種通信方式均在蓬勃發(fā)展,光纖通信由于其體積小、重量輕、壽命長、容易維護、保密性好、抗干擾性強、容量大等優(yōu)點,成為主要的通信方式。目前,應用于光纖通信的各類各種速率的芯片大部分為國外所產,所以我們急需開發(fā)此類具有自主知識產權的集成電路,以滿足我國在光纖通信領域發(fā)展的需要。 論文將光接收機的實際應用與科研項目相結合,設計了一款基于SPDIF協(xié)議應用于7.1聲道多媒體設備的具有25Mbps速率級的光接收機芯片。前置跨阻放大器將光檢測器輸出的微弱光電流信號放大并轉換成電壓信號,為了提高其增益并降低其噪聲特性,本文將傳統(tǒng)的共源極基本放大器改進為共源共柵基本放大器。為了增加輸入動態(tài)范圍,創(chuàng)造性地設計了半球體方式的PIN光電二極管結構,增加了光接收面積,,并在電路中增加了自動增益控制電路。為了使芯片具有更高的抗噪工作性能,設計了噪聲閾值控制電路。為了防止輸出在驅動管開關動作時,通過襯底串擾耦合到輸入級,產生誤操作影響系統(tǒng)的穩(wěn)定性,版圖布局中將模擬電源、地與數(shù)字電源、地分開布置。 芯片XD6626整體電路設計基于0.5μm CMOS工藝,采用Cadence軟件,對芯片在輸入不同大小和速率的輸出狀態(tài)以及關鍵技術指標進行了仿真驗證。仿真結果表明,芯片各項指標均滿足設計要求,性能良好。最后給出了樣片的實測數(shù)據,其結果符合設計需求。
[Abstract]:In recent years, all kinds of communication methods used for information transmission are booming. Optical fiber communication has the advantages of small volume, light weight, long life, easy maintenance, good confidentiality, strong anti-interference, large capacity, etc. At present, most of the chips of various rates used in optical fiber communication are produced abroad, so we urgently need to develop such integrated circuits with their own intellectual property rights. In order to meet the needs of our country in the field of optical fiber communication development. This paper combines the practical application of optical receiver with scientific research projects. A 25Mbps rate level optical receiver chip based on SPDIF protocol is designed for 7.1 channel multimedia devices. The pre-transimpedance amplifier amplifies and converts the weak photocurrent signal from the photodetector into a voltage signal. In order to improve the gain and reduce the noise characteristics, the conventional common-source basic amplifier is modified to the common-grid basic amplifier. In order to increase the input dynamic range, the semi-sphere PIN photodiode structure is designed creatively. The optical receiving area is increased, and the automatic gain control circuit is added to the circuit. In order to make the chip have higher anti-noise performance, a noise threshold control circuit is designed. Through the substrate crosstalk coupling to the input stage, the misoperation will affect the stability of the system. In the layout layout, the analog power supply, ground and digital power supply will be arranged separately. The whole circuit design of XD6626 chip is based on 0.5 渭 m CMOS technology. The output state and key technical index of the chip are simulated and verified by Cadence software. The simulation results show that the output state and key technical index of the chip are different in size and rate. Each index of the chip meets the design requirements and the performance is good. Finally, the measured data of the chip are given, and the results are in line with the design requirements.
【學位授予單位】:西安電子科技大學
【學位級別】:碩士
【學位授予年份】:2014
【分類號】:TN851

【參考文獻】

相關期刊論文 前6條

1 田俊,王志功,梁幫立,熊明珍,施毅,鄭有p

本文編號:1527763


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