本文選題：虛擬儀器技術(shù) + USB　； 參考：《吉林大學(xué)》2017年碩士論文

【摘要】：虛擬儀器技術(shù)是融合了儀器科學(xué)與計(jì)算機(jī)科學(xué),并結(jié)合信息技術(shù)和儀器儀表技術(shù),廣泛應(yīng)用于自動(dòng)測(cè)試系統(tǒng)等領(lǐng)域的產(chǎn)品開(kāi)發(fā)中。吉林大學(xué)自主研發(fā)了應(yīng)用于高校實(shí)驗(yàn)教學(xué)的虛擬電子測(cè)量?jī)x器集成系統(tǒng),針對(duì)該系統(tǒng)現(xiàn)時(shí)有長(zhǎng)時(shí)間工作后死機(jī)現(xiàn)象及數(shù)據(jù)量過(guò)多時(shí)會(huì)丟失的問(wèn)題,本文對(duì)系統(tǒng)控制器提出集USB3.0、ARM9、FPGA、Lab VIEW等多種技術(shù)于一體的再設(shè)計(jì)方案。該方案圍繞FPGA芯片EP3C16F484C8N和USB3.0芯片CYUSB3014兩核心芯片進(jìn)行設(shè)計(jì)。硬件電路主要包括供電電路、外部時(shí)鐘電路、配置電路、USB3.0接口電路、CYUSB3014與FPGA的接口電路、地址譯碼電路等。利用Quartus II軟件設(shè)計(jì)了FPGA的邏輯程序,主要有控制卡和功能板卡的雙口RAM通信單元,時(shí)鐘信號(hào)的倍頻和分頻等,實(shí)現(xiàn)了中斷處理、同步觸發(fā)、時(shí)鐘發(fā)生、監(jiān)控等功能。在Eclipse IDE平臺(tái)上開(kāi)發(fā)了FX3的固件程序、設(shè)備驅(qū)動(dòng)程序,完成了設(shè)備的枚舉和初始化、端點(diǎn)配置、GPIF II配置等。使用Lab VIEW軟件設(shè)計(jì)了有良好的人機(jī)交互界面的應(yīng)用程序,用VC++6.0軟件編程并生成了動(dòng)態(tài)鏈接庫(kù)。應(yīng)用程序通過(guò)CLF節(jié)點(diǎn)調(diào)用動(dòng)態(tài)連接庫(kù),實(shí)現(xiàn)與USB3.0接口的通信,完成命令和消息的傳輸、解析,進(jìn)而去控制各個(gè)模塊化儀器的工作。在完成控制器的設(shè)計(jì)后,通過(guò)自行設(shè)計(jì)的Lab VIEW應(yīng)用程序測(cè)試控制器和其他功能板卡的通信情況來(lái)驗(yàn)證方案的可行性。實(shí)驗(yàn)結(jié)果表明,該方案可行且達(dá)到了增強(qiáng)系統(tǒng)穩(wěn)定性,提高總線帶寬的效果。
[Abstract]:Virtual instrument technology is a combination of instrument science and computer science, and combined with information technology and instrument technology, it is widely used in the development of automatic test system and other fields. Jilin University has independently developed a virtual electronic measuring instrument integrated system for experimental teaching in colleges and universities. Aiming at the problem that the system currently has the phenomenon of long working time and the problem that the data will be lost when the data is too much, This paper presents a redesign scheme for the system controller which integrates USB3.0 / ARM9 FPGA LabVIEW and other technologies. This scheme focuses on FPGA chip EP3C16F484C8N and USB3.0 chip CYUSB3014. The hardware circuit includes power supply circuit, external clock circuit, configuration circuit, interface circuit of CYUSB3014 and FPGA, address decoding circuit and so on. The logic program of FPGA is designed by using Quartus II software, which includes dual port RAM communication unit of control card and function board, frequency doubling and frequency division of clock signal, etc. The functions of interrupt processing, synchronous trigger, clock occurrence, monitoring and so on are realized. The firmware program and device driver of FX3 are developed on the Eclipse IDE platform. The enumeration and initialization of the device and the configuration of the endpoint / GPIF II are completed. The application program with good man-machine interface is designed by using LabVIEW software, and the dynamic link library is generated by using VC 6.0 software. The application program calls the dynamic connection library through the CLF node, realizes the communication with USB3.0 interface, completes the command and message transmission, parses, and then controls the work of each modular instrument. After the design of the controller is completed, the feasibility of the scheme is verified by testing the communication between the controller and other functional boards by using the LabVIEW application program designed by ourselves. The experimental results show that the scheme is feasible and achieves the effect of enhancing system stability and improving bus bandwidth.
【學(xué)位授予單位】：吉林大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類號(hào)】：TH702;TP273

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