10-40GHz集成電路在片測(cè)試平臺(tái)設(shè)計(jì)
發(fā)布時(shí)間:2018-01-15 06:20
本文關(guān)鍵詞:10-40GHz集成電路在片測(cè)試平臺(tái)設(shè)計(jì) 出處:《東南大學(xué)》2017年碩士論文 論文類(lèi)型:學(xué)位論文
更多相關(guān)文章: 在片測(cè)試 脈沖 功率放大器 多功能 自動(dòng)化
【摘要】:半導(dǎo)體工藝技術(shù)的進(jìn)步促進(jìn)了集成電路在小型化、低功耗、高輸出功率和高集成度等方面的進(jìn)步,對(duì)集成電路的測(cè)試技術(shù)和要求也不斷提高。根據(jù)新的測(cè)試需求需要設(shè)計(jì)10-40GHz集成電路在片測(cè)試平臺(tái)以迎合工程化應(yīng)用,平臺(tái)采用在片的方式全面測(cè)試芯片的電性能參數(shù),可以保障裝配的成品率、完善集成電路的批生產(chǎn)技術(shù),實(shí)現(xiàn)產(chǎn)品的生產(chǎn)過(guò)程控制。論文首先對(duì)10-40GHz IC性能參數(shù)進(jìn)行了分析和歸納,設(shè)計(jì)了基于半自動(dòng)探針臺(tái)和網(wǎng)絡(luò)分析儀等測(cè)試儀器的10-40GHz集成電路在片測(cè)試平臺(tái),該平臺(tái)由多功能多參數(shù)在片測(cè)試子平臺(tái)和脈沖功率在片測(cè)試子平臺(tái)組成。通過(guò)分析相關(guān)儀器的測(cè)試校準(zhǔn)技術(shù),對(duì)部分校準(zhǔn)方法進(jìn)行優(yōu)化,以適用于在片測(cè)試工程化應(yīng)用。在多功能多參數(shù)在片測(cè)試子平臺(tái)方面,設(shè)計(jì)了多功能驅(qū)動(dòng)器,以提供滿足集成電路測(cè)試所需要的不同驅(qū)動(dòng)信號(hào)。在脈沖功率在片測(cè)試子平臺(tái)方面,對(duì)直流探針卡偏置電路進(jìn)行優(yōu)化設(shè)計(jì)解決功率放大器在片測(cè)試穩(wěn)定性問(wèn)題,通過(guò)嵌入前置放大器的方法提升脈沖功率在片測(cè)試子平臺(tái)的驅(qū)動(dòng)能力,并且能夠快速測(cè)試放大器的附加效率,實(shí)現(xiàn)功率放大器的快速在片測(cè)試。測(cè)試平臺(tái)驗(yàn)證結(jié)果表明設(shè)計(jì)達(dá)到指標(biāo)要求。論文通過(guò)部分技術(shù)的優(yōu)化,實(shí)現(xiàn)了簡(jiǎn)易、便捷的校準(zhǔn)、測(cè)試,同時(shí)實(shí)現(xiàn)了在片測(cè)試的自動(dòng)化,使得測(cè)試平臺(tái)具備高重復(fù)性、穩(wěn)定性和易操作性,適用于在片測(cè)試的工程化應(yīng)用,可以應(yīng)用于10-40GHz單片集成電路的電參數(shù)測(cè)試。
[Abstract]:The progress of semiconductor technology has promoted the progress of integrated circuits in miniaturization, low power consumption, high output power and high integration. According to the new test requirements, 10-40GHz integrated circuit in chip test platform is designed to meet the needs of engineering applications. The platform adopts on-chip mode to test the electrical performance parameters of the chip, which can guarantee the finished product rate of assembly and improve the batch production technology of integrated circuit. Firstly, the performance parameters of 10-40GHz IC are analyzed and summarized. A testing platform of 10-40GHz integrated circuit is designed based on semi-automatic probe table and network analyzer. The platform is composed of multi-function multi-parameter in-chip test sub-platform and pulse power in-chip test sub-platform. By analyzing the testing and calibration technology of related instruments, the partial calibration method is optimized. In order to be suitable for the engineering application of in-chip test, the multi-function driver is designed in the multi-function multi-parameter test sub-platform. In order to provide different driving signals to meet the needs of IC testing, the DC probe card bias circuit is optimized to solve the stability problem of the power amplifier in chip test in the pulse power in chip test sub-platform. By embedding the preamplifier, the driving capability of the pulse power in chip test subplatform is enhanced, and the additional efficiency of the amplifier can be measured quickly. The test platform verification results show that the design meets the requirements. Through the optimization of some technologies, the paper realizes simple and convenient calibration and testing. At the same time, the automation of in-chip test is realized, which makes the test platform has high repeatability, stability and easy operation, which is suitable for the engineering application of in-chip testing. It can be used to test the electrical parameters of 10-40 GHz monolithic integrated circuit.
【學(xué)位授予單位】:東南大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2017
【分類(lèi)號(hào)】:TN407
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