基片集成脊波導(dǎo)毫米波板間垂直互聯(lián)結(jié)構(gòu)研究
發(fā)布時(shí)間:2019-05-21 18:16
【摘要】:在毫米波系統(tǒng)級(jí)封裝(System-On-Package,SOP)中,需要一種寬帶、小型化、易集成的板間垂直互聯(lián)電路,以實(shí)現(xiàn)不同功能層之間毫米波信號(hào)的可靠互聯(lián)。不同于常規(guī)基片集成波導(dǎo)(SIW),提出一種基于Z向基片集成脊波導(dǎo)(Substrate-Integrated-Riged-Waveguide,SIRW)的毫米波板間垂直互聯(lián)結(jié)構(gòu)。該結(jié)構(gòu)體積小、易集成,可與多層基板加工工藝兼容、一體化同步實(shí)現(xiàn)。最后利用低溫共燒陶瓷(Low Temperature Co-fired Ceramic,LTCC)加工工藝,制作了背靠背互聯(lián)實(shí)物,電路接口尺寸2.2 mm×1.3 mm,經(jīng)測試在28~36 GHz頻帶內(nèi)實(shí)現(xiàn)單個(gè)互聯(lián)插損小于0.45dB,帶內(nèi)平坦度優(yōu)于±0.5 dB,回波損耗優(yōu)于-12 dB。
[Abstract]:In millimeter wave system level packaging (System-On-Package,SOP), a broadband, miniaturized and easy to integrate vertical interconnection circuit is needed to realize the reliable interconnection of millimeter wave signals between different functional layers. Different from the conventional substrate integrated waveguide (SIW), a vertical interconnection structure between millimeter wave plates based on Z-direction substrate integrated ridge waveguide (Substrate-Integrated-Riged-Waveguide,SIRW) is proposed. The structure is small in size, easy to integrate, compatible with multi-layer substrate processing technology, and realized synchronously. Finally, the back-to-back interconnection is fabricated by using the low temperature co-fired ceramic (Low Temperature Co-fired Ceramic,LTCC). The circuit interface size of 2.2 mm 脳 1.3 mm, is tested to achieve a single interconnection insertion loss of less than 0.45 dB in the 28 鈮,
本文編號(hào):2482288
[Abstract]:In millimeter wave system level packaging (System-On-Package,SOP), a broadband, miniaturized and easy to integrate vertical interconnection circuit is needed to realize the reliable interconnection of millimeter wave signals between different functional layers. Different from the conventional substrate integrated waveguide (SIW), a vertical interconnection structure between millimeter wave plates based on Z-direction substrate integrated ridge waveguide (Substrate-Integrated-Riged-Waveguide,SIRW) is proposed. The structure is small in size, easy to integrate, compatible with multi-layer substrate processing technology, and realized synchronously. Finally, the back-to-back interconnection is fabricated by using the low temperature co-fired ceramic (Low Temperature Co-fired Ceramic,LTCC). The circuit interface size of 2.2 mm 脳 1.3 mm, is tested to achieve a single interconnection insertion loss of less than 0.45 dB in the 28 鈮,
本文編號(hào):2482288
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