【摘要】：傳統(tǒng)多串口并行通信數(shù)據(jù)傳輸系統(tǒng)無法自主獲取串口號,需手動選擇再打開串口,需要使用者事先了解接口編碼,這無形增加了系統(tǒng)的工作時(shí)間。為此,設(shè)計(jì)一種基于FPGA的多串口并行通信數(shù)據(jù)傳輸系統(tǒng),該系統(tǒng)中的串口數(shù)據(jù)接收模塊采集多串口數(shù)據(jù),并通過控制寄存器達(dá)到控制通信數(shù)據(jù)波特率的目的。系統(tǒng)利用NiosⅡ處理器使8種信道共同進(jìn)行傳輸工作,其將數(shù)據(jù)傳輸?shù)讲⒋D(zhuǎn)換模塊。并串轉(zhuǎn)換模塊對輸出的8位并行數(shù)據(jù)添加通道標(biāo)識、并串轉(zhuǎn)換處理,再將處理后的并行數(shù)據(jù)傳遞到串口輸出選擇模塊中。依據(jù)數(shù)據(jù)脈沖上升沿設(shè)計(jì)串口輸出選擇模塊,該模塊通過多路分配器將有數(shù)據(jù)通道的數(shù)據(jù)串行逐位送出。系統(tǒng)在軟件中進(jìn)行了傳輸設(shè)計(jì)、NiosⅡ處理器流程設(shè)計(jì)以及通信設(shè)備類的設(shè)計(jì)與封裝。實(shí)驗(yàn)結(jié)果表明,所設(shè)計(jì)系統(tǒng)在FPGA上正確實(shí)現(xiàn)了8個(gè)串口數(shù)據(jù)的傳輸,并且具有較高的數(shù)據(jù)接收成功率。
[Abstract]:The traditional multi-serial port parallel communication data transmission system can not obtain serial number independently, and needs to manually select and open serial port, which requires the user to know the interface code in advance, which increases the working time of the system intangibly. For this reason, a multi-serial port parallel communication data transmission system based on FPGA is designed. The serial port data receiving module in the system collects multi-serial port data and achieves the purpose of controlling the baud rate of communication data through the control register. The system uses Nios 鈪，

本文編號：2373822