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抗干擾導航接收機的設計與實現(xiàn)

發(fā)布時間:2018-09-08 18:58
【摘要】:目前,衛(wèi)星導航系統(tǒng)在民用和軍事領域都有很廣泛的應用,影響著國家的科技實力和軍事實力。但衛(wèi)星導航系統(tǒng)由于工作環(huán)境復雜并且自身信號的脆弱性,極易受到環(huán)境中干擾的影響。并且因為其在各領域中的重要作用,也會面臨各種人為設置的干擾,這種干擾很容易造成接收機無法正常工作。因此,從20世紀90年代開始,國外對衛(wèi)星導航系統(tǒng)抗干擾技術的理論和實現(xiàn)都做了大量研究。國內(nèi)的研究起步比較晚,但學習了國外的研究經(jīng)驗目前進展迅速。在此背景下,本文研究了抗干擾系統(tǒng)的抗干擾原理,并完成了數(shù)字信號處理板的硬件設計和實現(xiàn)。首先,本文研究了衛(wèi)星導航系統(tǒng)的抗干擾原理。針對接收機在環(huán)境中受到的干擾,并將干擾進行了分類和分析,這將有益于抗干擾技術的研究。在此基礎上,本文分析了導航抗干擾系統(tǒng)的總體結(jié)構和各部分功能?梢钥闯鰯(shù)字信號處理板是抗干擾算法實現(xiàn)的平臺,也是抗干擾系統(tǒng)的核心模塊。本文還根據(jù)處理域的不同,介紹了幾類抗干擾濾波技術的算法原理,并分析了它們的優(yōu)勢和缺陷。其次,本文的重點是數(shù)字信號處理板的整體硬件設計和實現(xiàn)。介紹了數(shù)字信號處理板的整體結(jié)構和信號處理流程,詳細描述了 A/D模塊、D/A模塊和FPGA模塊等主要模塊的芯片選型和外圍電路設計,還給出了數(shù)字信號處理板整體的PCB板設計和硬件實物。最后,本文分兩部分對抗干擾系統(tǒng)進行了測試。先在室內(nèi)對數(shù)字信號處理板的每個模塊進行測試并給出了實驗結(jié)果,然后通過外場實驗驗證抗干擾系統(tǒng)整機的抗干擾能力。根據(jù)實驗結(jié)果,本文設計的數(shù)字信號處理板可以在抗干擾系統(tǒng)中發(fā)揮作用,實現(xiàn)抗干擾功能。
[Abstract]:At present, the satellite navigation system is widely used in both civil and military fields, which affects the scientific and military strength of the country. However, the satellite navigation system is vulnerable to environmental interference because of its complex working environment and the fragility of its own signal. And because of its important role in various fields, it will also face a variety of artificial interference, this kind of interference is easy to cause the receiver can not work properly. Therefore, since 1990's, there has been a lot of research on the theory and realization of anti-jamming technology of satellite navigation system in foreign countries. Domestic research started relatively late, but learning from foreign research experience is developing rapidly. In this background, the anti-jamming principle of the anti-jamming system is studied, and the hardware design and implementation of the digital signal processing board are completed. Firstly, the anti-jamming principle of satellite navigation system is studied. The interference of the receiver in the environment is classified and analyzed, which will be beneficial to the research of anti-jamming technology. On this basis, this paper analyzes the overall structure and functions of the navigation anti-jamming system. It can be seen that the digital signal processing board is the platform of anti-interference algorithm and the core module of anti-jamming system. This paper also introduces the algorithm principle of several kinds of anti-jamming filtering technology according to the different processing domain, and analyzes their advantages and disadvantages. Secondly, the emphasis of this paper is the whole hardware design and implementation of digital signal processing board. This paper introduces the whole structure and signal processing flow of the digital signal processing board, and describes in detail the chip selection and peripheral circuit design of the main modules, such as the A / D module, the D / A module and the FPGA module, etc. The PCB board design and hardware object of the whole digital signal processing board are also given. Finally, this paper divides two parts to carry on the test to the anti-jamming system. Each module of the digital signal processing board is tested in the room and the experimental results are given. Then the anti-interference ability of the anti-jamming system is verified by the field experiment. According to the experimental results, the digital signal processing board designed in this paper can play a role in anti-jamming system and realize anti-interference function.
【學位授予單位】:電子科技大學
【學位級別】:碩士
【學位授予年份】:2017
【分類號】:TN965.5

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