本文選題：無線通信 + 射頻收發(fā)機　； 參考：《南京郵電大學》2017年碩士論文

【摘要】：為了完善射頻收發(fā)機的功能模塊,適應(yīng)具有多樣通信方式的無線通信系統(tǒng)的迫切需求,本文基于軟件無線電通信技術(shù)驗證平臺項目的開發(fā)需要,對系統(tǒng)的軟件和部分硬件進行了設(shè)計、開發(fā)和驗證。系統(tǒng)的設(shè)計主要分為四個部分:一是計算機的matlab部分,用于處理數(shù)字信息以及完成信號的調(diào)制解調(diào)等。二是射頻收發(fā)機硬件傳輸鏈路,發(fā)射鏈路將基帶信號調(diào)制至高頻載波以便空間傳輸,接收鏈路接收已調(diào)信號并下變頻至基帶。三是嵌入式系統(tǒng)部分,由STM32(ST micro ecectics)單片機控制系統(tǒng)的運行,FPGA(Field-Programmable Gate Array)作為基帶數(shù)字信號處理中樞并驅(qū)動外圍設(shè)備。四是計算機和射頻收發(fā)機通信接口,采用USB2.0(Universal Serial Bus2.0)協(xié)議,利用matlab與C語言的接口完成頂層開發(fā),FPGA狀態(tài)機完成底層USB驅(qū)動。根據(jù)上述系統(tǒng)的四個部分,本論文主要從以下幾個方面進行了設(shè)計和闡述:一是系統(tǒng)整體程序架構(gòu)與系統(tǒng)數(shù)據(jù)存儲架構(gòu)的介紹。二是上位機軟件對射頻收發(fā)機的控制方法和兩者之間的接口設(shè)計。三是軟硬結(jié)合,設(shè)計簡易信號發(fā)生器、頻譜分析模塊與調(diào)制解調(diào)模塊等演示及調(diào)試模塊。四是設(shè)計數(shù)據(jù)收發(fā)緩存模塊,擴大系統(tǒng)的內(nèi)存空間,為系統(tǒng)的可擴展性提供保障。與此同時,還給出了諸多實測的圖片案例,形象的描述了各模塊的相關(guān)功能。本系統(tǒng)目前底層軟件和通信接口已設(shè)計完成,上位機軟件模塊也進行了初步的開發(fā)和測試,為后續(xù)完善的軟件產(chǎn)品開發(fā)奠定了基礎(chǔ)。
[Abstract]:In order to perfect the function module of RF transceiver and adapt to the urgent need of wireless communication system with various communication modes, this paper is based on the development of software radio communication technology verification platform project. The software and some hardware of the system are designed, developed and verified. The design of the system is divided into four parts: one is the matlab part of the computer, which is used to process digital information and complete signal modulation and demodulation. Second, the RF transceiver hardware transmission link, the transmission link modulates the baseband signal to the high-frequency carrier for space transmission, the receiving link receives the modulated signal and down converts to the baseband. The third part is the embedded system, which is controlled by STM32(ST micro microcontroller (FPGA Field-Programmable Gate Array) as the baseband digital signal processing center and drives the peripheral equipment. The fourth is the communication interface between computer and RF transceiver, which adopts USB2.0(Universal Serial bus 2.0 protocol and uses the interface between matlab and C language to complete the top-level USB driver. According to the four parts of the above system, this paper mainly designs and expounds the following aspects: the first is the introduction of the whole system program architecture and the system data storage architecture. The other is the design of the control method and the interface between the upper computer software and the RF transceiver. The third is the combination of soft and hard, simple signal generator, spectrum analysis module and modulation and demodulation module and so on demonstration and debugging module. Fourth, design the data receiving and sending cache module, enlarge the memory space of the system, and provide the guarantee for the system expansibility. At the same time, many real picture cases are given, which describe the function of each module graphically. At present, the bottom software and communication interface of the system have been designed and completed, and the software module of the upper computer has also been preliminarily developed and tested, which lays a foundation for the further perfect software product development.
【學位授予單位】：南京郵電大學
【學位級別】：碩士
【學位授予年份】：2017
【分類號】：TN92

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本文編號：1899377