本文選題：超高聲速　切入點：時間壓縮　出處：《南京理工大學》2017年碩士論文

【摘要】：隨著超高聲速飛行器的迅猛發(fā)展,超高聲速目標探測雷達的研制也越來越迫切。雷達系統(tǒng)的核心是信號處理算法,研究快速有效的超高聲速目標回波處理算法是必要的。研制一款雷達需要測試,而使用實際飛行器測試一款超高聲速目標探測雷達成本巨大。因此使用雷達目標模擬器模擬超高聲速目標信號的方法得到了廣泛應(yīng)用。本文圍繞超高聲速目標回波的產(chǎn)生方案和處理算法兩方面內(nèi)容展開論述。本文首先通過數(shù)學推導(dǎo)建立一般速度條件下的回波數(shù)學模型,再推廣到超高聲速情況,指出超高聲速條件下目標回波的特征是其時間壓縮效應(yīng)不能忽略;其次根據(jù)超高聲速目標回波數(shù)學模型討論其產(chǎn)生方案,表明最關(guān)鍵的問題是時間壓縮的模擬,并圍繞此問題展開論述;然后分析超高聲速目標回波對信號處理的影響是存在距離走動,研究基于keystone變換的距離走動校正算法;接著根據(jù)本文闡述的超高聲速目標回波產(chǎn)生方案論述基于FPGA的超高聲速目標回波模擬器的設(shè)計與實現(xiàn);最后使用本文研究的超高聲速目標回波處理算法處理模擬器產(chǎn)生的數(shù)據(jù),驗證模擬器工作的正確性,證明回波產(chǎn)生方案的可行性。
[Abstract]:With the rapid development of ultra-high sound vehicle, the development of ultra-high sound target detection radar is becoming more and more urgent. The core of radar system is signal processing algorithm. It is necessary to study a fast and effective algorithm for the processing of ultra-high sound velocity target echo. It is necessary to develop a radar that needs to be tested. However, it is very expensive to test an ultra-high sound target detection radar by using an actual aircraft. Therefore, the method of using radar target simulator to simulate ultra-high sound target signal has been widely used. This paper revolves around ultra-high sound velocity target return. The generation scheme and processing algorithm of wave are discussed in this paper. Firstly, the mathematical model of echo under general velocity condition is established by mathematical derivation. It is pointed out that the characteristic of target echo under ultra-high sound velocity is that the time squeezing effect can not be ignored. Secondly, according to the mathematical model of ultra-high sound velocity target echo, the generating scheme is discussed. It is shown that the most critical problem is the simulation of time compression, which is discussed in detail, and then the range walk correction algorithm based on keystone transform is studied by analyzing the influence of ultra-high acoustic target echo on signal processing. Then the design and implementation of ultra-high sound target echo simulator based on FPGA are discussed according to the scheme of ultra-high sound velocity target echo generated in this paper, and the data generated by simulator are processed by using the algorithm of ultra-high sound velocity target echo processing studied in this paper. The correctness of the simulator is verified and the feasibility of the echo generation scheme is proved.
【學位授予單位】：南京理工大學
【學位級別】：碩士
【學位授予年份】：2017
【分類號】：TN957.51

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本文編號：1690056