發(fā)布時間：2018-03-22 16:40

  本文選題：信道模擬器　切入點(diǎn)：FPGA　出處：《南京信息工程大學(xué)》2017年碩士論文　論文類型：學(xué)位論文

【摘要】：衛(wèi)星信道模擬器能夠模擬衛(wèi)星信道的傳播特性,用于設(shè)備的通信調(diào)試,節(jié)約研發(fā)成本。目前,很多衛(wèi)星信道模擬器在參數(shù)設(shè)置上存在問題:有的參數(shù)難以調(diào)節(jié);有的采用上位機(jī)進(jìn)行參數(shù)設(shè)置,通過上位機(jī)設(shè)置參數(shù)需要連接電腦,適應(yīng)性差。針對上述問題提出了一種基于FPGA可觸控衛(wèi)星信道模擬器,FPGA作為算法實現(xiàn)和控制單元,通過控制觸摸屏方便快捷的實現(xiàn)參數(shù)設(shè)置。本文主要工作內(nèi)容如下:(1)設(shè)計衛(wèi)星信道傳輸特性模擬方案。在對衛(wèi)星信道傳輸特性、概率分布函數(shù)以及經(jīng)典信道模型分析的基礎(chǔ)上,設(shè)計出本文的衛(wèi)星信道傳輸特性模擬方案。(2)設(shè)計衛(wèi)星信道模擬器硬件系統(tǒng)。根據(jù)設(shè)計指標(biāo)合理選擇芯片,以FPGA為核心進(jìn)行硬件系統(tǒng)設(shè)計,硬件系統(tǒng)主要包括FPGA模塊、觸摸屏模塊、A/D轉(zhuǎn)換模塊、D/A轉(zhuǎn)換模塊以及濾波電路。(3)設(shè)計衛(wèi)星信道模擬器算法程序。算法程序主要包括多普勒頻移、多徑時延與增益、瑞利分布、對數(shù)正態(tài)分布和高斯白噪聲等。通過Maltab的hist函數(shù)生成直方圖,驗證瑞利分布、對數(shù)正態(tài)分布和高斯白噪聲的正確性。(4)設(shè)計衛(wèi)星信道模擬器控制程序。主要包括NiosⅡ軟核設(shè)計、μC/OS-Ⅱ配置、UCGUI移植以及本系統(tǒng)的UCGUI界面設(shè)計。(5)測試平臺搭建及性能測試。測試平臺主要包括信號發(fā)生器和示波器。信號發(fā)生器產(chǎn)生波形傳輸給衛(wèi)星信道模擬器,然后輸出給示波器,通過示波器觀察輸入輸出信號時域和頻域特性驗證多普勒頻移的正確性;把示波器數(shù)據(jù)導(dǎo)出生成直方圖驗證瑞利分布、對數(shù)正態(tài)分布和高斯白噪聲的正確性。系統(tǒng)測試結(jié)果表明,設(shè)計的衛(wèi)星信道模擬器能夠?qū)崿F(xiàn)衛(wèi)星信道傳輸特性的模擬,滿足設(shè)計指標(biāo)。
[Abstract]:The satellite channel simulator can simulate the propagation characteristics of the satellite channel, which can be used for the communication debugging of the equipment and save the research and development cost. At present, many satellite channel simulators have some problems in parameter setting: some parameters are difficult to adjust; Some use the upper computer to set the parameters, which need to be connected to the computer through the upper computer, so the adaptability is poor. In view of the above problems, a kind of FPGA touchable satellite channel simulator is proposed as the algorithm implementation and control unit. The main work of this paper is as follows: 1) Design the simulation scheme of satellite channel transmission characteristics. Based on the analysis of satellite channel transmission characteristics, probability distribution function and classical channel model, The hardware system of satellite channel simulator is designed. According to the design index, the hardware system is designed with FPGA as the core. The hardware system mainly includes FPGA module. The algorithm program of satellite channel simulator is designed, which includes Doppler frequency shift, multipath delay and gain, Rayleigh distribution. Logarithmic normal distribution and Gao Si white noise etc. The histogram is generated by hist function of Maltab to verify the Rayleigh distribution. The control program of satellite channel simulator is designed by logarithmic normal distribution and correctness of Gao Si white noise. It mainly includes Nios 鈪，

本文編號：1649496