本文關(guān)鍵詞：脈沖雷達(dá)信號分選識別算法研究　出處：《電子科技大學(xué)》2016年碩士論文　論文類型：學(xué)位論文

  更多相關(guān)文章： 雷達(dá)信號分選 PRI調(diào)制識別 TMS320C6678 多核實現(xiàn)

【摘要】：脈沖雷達(dá)信號的分選識別,作為電子偵察中最為重要的一環(huán),是雷達(dá)偵察的基礎(chǔ)與核心。在當(dāng)今復(fù)雜的電磁空間環(huán)境中,不但信號密度大,而且信號脈內(nèi)調(diào)制和脈間調(diào)制也是愈發(fā)復(fù)雜,這使得雷達(dá)偵察的難度也越來越大�，F(xiàn)代電子情報系統(tǒng)(Electronic Intelligence,ELINT)、電子支援系統(tǒng)(Electronic Support Measure,ESM)和雷達(dá)威脅警報系統(tǒng)(Radar Warning Receiver,RWR)都要求具備準(zhǔn)確分析、快速處理各種雷達(dá)信號的能力,這也對雷達(dá)信號的分選識別的準(zhǔn)確性與實時性有很高的要求。本文針對脈沖雷達(dá)信號的分選識別與多核數(shù)字信號處理器(Digital Signal Processor,DSP)上的硬件實現(xiàn)做了以下工作:1.介紹了雷達(dá)信號分選識別的脈內(nèi)參數(shù)及脈間參數(shù),分析了各參數(shù)在信號分選識別中的地位。研究了現(xiàn)代雷達(dá)信號分選中較常用的幾種雷達(dá)分選算法,進(jìn)行了仿真實驗,比較了多種雷達(dá)信號分選算法的優(yōu)劣及適用范圍。2.針對現(xiàn)有的分選算法對復(fù)雜調(diào)制脈沖重復(fù)間隔(Pulse Repeatition Interval,PRI)分選效果不理想的情況,研究了一種可用于工程實現(xiàn)的信號分選算法;利用脈沖到達(dá)角(Direction of Arrival,DOA)、脈沖載頻(Carrier Frequency,CF)、脈沖寬度(Pulse Width,PW)等參數(shù)進(jìn)行脈沖相似度分析,研究了基于脈沖相似度的改進(jìn)序列差分直方圖(Sequential Difference Histogram,SDIF)算法。3.針對目前雷達(dá)常用的四種PRI調(diào)制樣式:固定PRI,抖動PRI,滑變PRI以及參差PRI,研究了一種快速穩(wěn)健的PRI調(diào)制識別方法。該方法通過對PRI序列提取四種特征參數(shù),可在脈沖丟失率小于20%的情況下達(dá)到90%以上的正確識別概率。且該識別算法運(yùn)算量較小,可在工程中快速實現(xiàn)。4.本文以一個ELINT原型樣機(jī)的工程實例為背景,介紹了雷達(dá)信號分選識別算法實現(xiàn)的硬件平臺�；赥MS320C6678硬件平臺研究了脈沖雷達(dá)信號分選識別算法的硬件實現(xiàn)。利用TMS320C6678芯片的多核結(jié)構(gòu)相對傳統(tǒng)單核DSP的優(yōu)勢,研究了一種雷達(dá)信號偵察算法多核分配結(jié)構(gòu),將分選識別算法在DSP上進(jìn)行了硬件實現(xiàn)。最后給出了系統(tǒng)聯(lián)試的測試結(jié)果,證明了信號分選識別算法的有效性和多核可實現(xiàn)性。
[Abstract]:As the most important part of electronic reconnaissance, the sorting and recognition of pulse radar signal is the basis and core of radar reconnaissance. In the complex electromagnetic space environment, the signal density is not only high. Moreover, intra-pulse modulation and inter-pulse modulation are becoming more and more complex, which makes radar reconnaissance more and more difficult. Modern electronic information system electronic Intelligence. Electronic Support Measure. Both ESMand Radar Warning receiver (RWR) require the ability of accurate analysis and fast processing of various radar signals. This also requires the accuracy and real time of radar signal sorting and recognition. This paper aims at the sorting and recognition of pulse radar signal and multi-core digital signal processor (. Digital Signal Processor. The hardware implementation of DSP has done the following work: 1. The intra-pulse parameters and inter-pulse parameters of radar signal sorting and identification are introduced. This paper analyzes the status of each parameter in signal sorting and recognition, studies several radar sorting algorithms commonly used in modern radar signal sorting, and carries out simulation experiments. The advantages and disadvantages of various radar signal sorting algorithms and their application range are compared. 2. Aiming at the existing sorting algorithms for complex modulation pulse repetition interval (. Pulse Repeatition Interval. In the case of poor sorting effect, a signal sorting algorithm which can be used in engineering is studied. Pulse arrival Angle Direction of Arrivalo load, Pulse Carrier Frequency (CF). Pulse width pulse width and other parameters are analyzed by pulse similarity analysis. The improved sequence differential Difference Histogram based on pulse similarity is studied. SDIF.3. aiming at four kinds of PRI modulation styles commonly used in radar at present: fixed PRI, jitter pri, sliding PRI and staggered PRI. A fast robust PRI modulation recognition method is studied, which extracts four characteristic parameters from PRI sequences. When the pulse loss rate is less than 20%, the correct recognition probability can be achieved above 90%, and the computation of the recognition algorithm is small. It can be quickly realized in engineering. 4. The background of this paper is an engineering example of a prototype of ELINT. This paper introduces the hardware platform of radar signal sorting recognition algorithm. Based on TMS320C6678 hardware platform, the hardware implementation of pulse radar signal sorting recognition algorithm is studied. TMS320C66 is used to realize the algorithm. The multi-core structure of the 78 chip is superior to that of the traditional single-core DSP. In this paper, a multi-core allocation structure of radar signal reconnaissance algorithm is studied, and the sorting and recognition algorithm is implemented on DSP. Finally, the test results of the system are given. It is proved that the algorithm of signal sorting and recognition is effective and multi-core realizable.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2016
【分類號】：TN957.51

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本文編號：1385549