基于FPGA的實(shí)時(shí)圖像矯正系統(tǒng)設(shè)計(jì)
發(fā)布時(shí)間：2019-05-09 16:36
【摘要】：由光學(xué)鏡頭透視引起的非線性畸變失真問題給眾多對圖像質(zhì)量有較高精度要求的領(lǐng)域造成了重大困擾,本文針對圖像畸變問題設(shè)計(jì)了一種基于FPGA的實(shí)時(shí)圖像矯正系統(tǒng),并圍繞降低FPGA的片上內(nèi)存消耗和提高行緩存讀寫效率展開研究,其在醫(yī)學(xué)圖像、航空遙感、視頻安防監(jiān)控、倒車影像、多攝像頭系統(tǒng)等諸多領(lǐng)域都具有重要的應(yīng)用價(jià)值和應(yīng)用前景。本文的主要工作和創(chuàng)新有以下幾點(diǎn):1、根據(jù)鏡頭畸變失真的連續(xù)性,本文提出了坐標(biāo)LUT的16點(diǎn)插值法,將16×16格點(diǎn)內(nèi)所有像素的反向映射坐標(biāo)由其四角上的像素坐標(biāo)通過雙線性插值算法構(gòu)造出來,該方法可顯著壓縮LUT的內(nèi)存消耗。2、行緩存因視頻圖像的實(shí)時(shí)性而難以被壓縮,本文提出了基于讀擴(kuò)展的環(huán)形行緩存讀寫算法,使圖像上映射和下映射共用一片內(nèi)存空間,并利用行同步信號的消隱間隔擴(kuò)展讀周期,使讀寫指針循序錯(cuò)開,保證上下映射的空間以完成正確的反向映射。相比傳統(tǒng)的以最大偏移作為行緩存的結(jié)構(gòu),改進(jìn)的專用控制算法可以減少近50%的內(nèi)存消耗。3、為了提高行緩存的讀寫效率,系統(tǒng)還引入了基于Block-RAM結(jié)構(gòu)的行緩存,在一個(gè)像素時(shí)鐘內(nèi)通過讀地址的奇偶性規(guī)則可同時(shí)從四個(gè)BRAM中讀取雙錢性插值窗四角的像素值。本文設(shè)計(jì)的實(shí)時(shí)圖像矯正系統(tǒng)已經(jīng)在單片F(xiàn)PGA內(nèi)實(shí)現(xiàn),實(shí)驗(yàn)結(jié)果表明所提出的LUT壓縮方法和讀擴(kuò)展行緩存算法顯著地改善了內(nèi)存消耗,同時(shí)獲得了較好的實(shí)時(shí)圖像矯正效果。
[Abstract]:The nonlinear distortion caused by optical lens perspective has caused great problems in many fields that have high precision requirements for image quality. In this paper, a real-time image correction system based on FPGA is designed to solve the image distortion problem. It also focuses on reducing the on-chip memory consumption of FPGA and improving the reading and writing efficiency of line cache. It is used in medical image, aerial remote sensing, video security monitoring and reverse image. Many fields such as multi-camera system have important application value and application prospect. The main work and innovation of this paper are as follows: 1. According to the continuity of lens distortion and distortion, the 16:00 interpolation method of coordinate LUT is proposed in this paper. The reverse mapping coordinates of all pixels in 16 脳 16 lattice points are constructed by bilinear interpolation algorithm from the pixel coordinates on their four corners. This method can significantly compress the memory consumption of LUT. 2, row cache is difficult to be compressed because of the real-time performance of video images. In this paper, a ring line cache reading and writing algorithm based on read extension is proposed, which makes the mapping on the image share a piece of memory space, and extends the reading period by using the blanking interval of the line synchronization signal, so that the read and write pointer is staggered in sequence. Ensure the upper and lower mapping space to complete the correct reverse mapping. Compared with the traditional structure with maximum offset as row cache, the improved special control algorithm can reduce memory consumption by nearly 50%. 3. In order to improve the reading and writing efficiency of row cache, the system also introduces row cache based on Block-RAM structure. The pixel values of the four corners of the double money interpolation window can be read from four BRAM at the same time by reading the parity rule of the address in a pixel clock. The real-time image correction system designed in this paper has been implemented in a single FPGA. The experimental results show that the proposed LUT compression method and read extended line cache algorithm can significantly improve the memory consumption, and obtain a good real-time image correction effect.
【學(xué)位授予單位】：浙江大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2016
【分類號】：TP391.41
本文編號：2472921
[Abstract]:The nonlinear distortion caused by optical lens perspective has caused great problems in many fields that have high precision requirements for image quality. In this paper, a real-time image correction system based on FPGA is designed to solve the image distortion problem. It also focuses on reducing the on-chip memory consumption of FPGA and improving the reading and writing efficiency of line cache. It is used in medical image, aerial remote sensing, video security monitoring and reverse image. Many fields such as multi-camera system have important application value and application prospect. The main work and innovation of this paper are as follows: 1. According to the continuity of lens distortion and distortion, the 16:00 interpolation method of coordinate LUT is proposed in this paper. The reverse mapping coordinates of all pixels in 16 脳 16 lattice points are constructed by bilinear interpolation algorithm from the pixel coordinates on their four corners. This method can significantly compress the memory consumption of LUT. 2, row cache is difficult to be compressed because of the real-time performance of video images. In this paper, a ring line cache reading and writing algorithm based on read extension is proposed, which makes the mapping on the image share a piece of memory space, and extends the reading period by using the blanking interval of the line synchronization signal, so that the read and write pointer is staggered in sequence. Ensure the upper and lower mapping space to complete the correct reverse mapping. Compared with the traditional structure with maximum offset as row cache, the improved special control algorithm can reduce memory consumption by nearly 50%. 3. In order to improve the reading and writing efficiency of row cache, the system also introduces row cache based on Block-RAM structure. The pixel values of the four corners of the double money interpolation window can be read from four BRAM at the same time by reading the parity rule of the address in a pixel clock. The real-time image correction system designed in this paper has been implemented in a single FPGA. The experimental results show that the proposed LUT compression method and read extended line cache algorithm can significantly improve the memory consumption, and obtain a good real-time image correction effect.
【學(xué)位授予單位】：浙江大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2016
【分類號】：TP391.41
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