基于FPGA的實(shí)時(shí)圖像矯正系統(tǒng)設(shè)計(jì)
[Abstract]:The nonlinear distortion caused by optical lens perspective has caused great problems in many fields that have high precision requirements for image quality. In this paper, a real-time image correction system based on FPGA is designed to solve the image distortion problem. It also focuses on reducing the on-chip memory consumption of FPGA and improving the reading and writing efficiency of line cache. It is used in medical image, aerial remote sensing, video security monitoring and reverse image. Many fields such as multi-camera system have important application value and application prospect. The main work and innovation of this paper are as follows: 1. According to the continuity of lens distortion and distortion, the 16:00 interpolation method of coordinate LUT is proposed in this paper. The reverse mapping coordinates of all pixels in 16 脳 16 lattice points are constructed by bilinear interpolation algorithm from the pixel coordinates on their four corners. This method can significantly compress the memory consumption of LUT. 2, row cache is difficult to be compressed because of the real-time performance of video images. In this paper, a ring line cache reading and writing algorithm based on read extension is proposed, which makes the mapping on the image share a piece of memory space, and extends the reading period by using the blanking interval of the line synchronization signal, so that the read and write pointer is staggered in sequence. Ensure the upper and lower mapping space to complete the correct reverse mapping. Compared with the traditional structure with maximum offset as row cache, the improved special control algorithm can reduce memory consumption by nearly 50%. 3. In order to improve the reading and writing efficiency of row cache, the system also introduces row cache based on Block-RAM structure. The pixel values of the four corners of the double money interpolation window can be read from four BRAM at the same time by reading the parity rule of the address in a pixel clock. The real-time image correction system designed in this paper has been implemented in a single FPGA. The experimental results show that the proposed LUT compression method and read extended line cache algorithm can significantly improve the memory consumption, and obtain a good real-time image correction effect.
【學(xué)位授予單位】:浙江大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2016
【分類(lèi)號(hào)】:TP391.41
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