本文選題：射頻識別(RFID) + 雙端口標簽�。� 參考：《天津大學(xué)》2016年碩士論文

【摘要】：隨著物聯(lián)網(wǎng)概念的提出和推廣,RFID技術(shù)再次引起人們的極大關(guān)注。作為RFID系統(tǒng)中的核心部件,射頻標簽直接決定著RFID系統(tǒng)的性能。然而,目前絕大多數(shù)標簽均采用單端口設(shè)計,即參與供電的射頻能量和參與通信的射頻信號來自同一天線。隨著工作距離增大,天線接收的射頻能量減小,難以同時滿足供電和信號傳遞的要求,因此標簽與閱讀器之間的通信中斷。為保證RFID系統(tǒng)的遠距離通信,本文從系統(tǒng)架構(gòu)和電路功耗兩方面對標簽進行研究。首先,本文提出了一種具有智能選擇功能的雙端口標簽方案,并基于UMC 0.18μm CMOS工藝對標簽中的智能選擇電路模塊進行分析與設(shè)計。其次,本文對射頻標簽中的整流電路、穩(wěn)壓電路、解調(diào)/調(diào)制電路模塊進行優(yōu)化設(shè)計,進一步降低標簽功耗。最后,對本文設(shè)計的電路模塊進行了版圖繪制和后仿。本文主要研究工作如下:1.設(shè)計了包括比較器和單刀雙擲開關(guān)的智能選擇電路。在理論分析的基礎(chǔ)上,設(shè)計了動態(tài)和靜態(tài)兩種不同結(jié)構(gòu)的比較器電路,并對二者的性能參數(shù)做了對比分析。其次,本文分析了開關(guān)電路的基本原理和性能參數(shù),設(shè)計了一種由MOS晶體管組成的單刀雙擲開關(guān)。仿真結(jié)果表明,靜態(tài)比較器電路的延時為56.2ns,電路功耗為463nW,滿足系統(tǒng)低功耗的性能要求,而開關(guān)電路的插損為-0.64dB,隔離度為-45.8dB,端口回波損耗小于-21dB,電路端口匹配良好。2.設(shè)計了整流和穩(wěn)壓電路。其中,整流電路設(shè)計中的二極管采用零閾值MOS管代替常規(guī)MOS管,因而獲得高的輸出電壓。穩(wěn)壓電路由啟動電路、電壓基準源和誤差放大器構(gòu)成。為降低功耗,啟動電路在后續(xù)電路正常工作后斷開工作,而誤差放大器采用低功耗的簡單兩級運放結(jié)構(gòu)。仿真結(jié)果表明,穩(wěn)壓電路可提供1.8V的穩(wěn)定供電電壓,保證標簽中電路模塊的正常工作,電路功耗為3μW。3.設(shè)計了ASK方式的解調(diào)和調(diào)制電路。為減小芯片面積,解調(diào)電路中遲滯比較器的參考電壓從低通濾波電路中提取,替代傳統(tǒng)的RC網(wǎng)絡(luò)電路。調(diào)制電路設(shè)計是基于反向散射原理。仿真結(jié)果表明,在915MHz載波頻率和40KHz調(diào)制信號頻率下,解調(diào)電路可成功解調(diào)輸入已調(diào)波信號,而調(diào)制電路可將標簽信息加入載波信號中,完成數(shù)字信號向模擬信號的轉(zhuǎn)變,兩電路功耗分別為1.2μW和130nW。
[Abstract]:With the development of the concept of Internet of things and the promotion of RFID technology, people pay more attention to it again. As the core component of RFID system, RF tag directly determines the performance of RFID system. However, at present, most of the tags are designed with single port, that is, the RF energy supplied by the power supply and the radio frequency signal involved in the communication come from the same antenna. With the increase of the operating distance, the RF energy received by the antenna decreases and it is difficult to meet the requirements of both power supply and signal transmission, so the communication between the tag and the reader is interrupted. In order to ensure the remote communication of RFID system, this paper studies the tag from the aspects of system architecture and circuit power consumption. Firstly, a two-port label scheme with intelligent selection function is proposed, and the intelligent selection circuit module is analyzed and designed based on UMC 0.18 渭 m CMOS process. Secondly, this paper optimizes the design of rectifier circuit, voltage stabilizer circuit and demodulation / modulation circuit module in RF tag to further reduce the tag power consumption. Finally, the layout of the circuit module designed in this paper is plotted and post-imitated. The main research work of this paper is as follows: 1. An intelligent selection circuit including comparator and single pole double throw switch is designed. On the basis of theoretical analysis, a comparator circuit with two different structures, dynamic and static, is designed, and their performance parameters are compared and analyzed. Secondly, the basic principle and performance parameters of the switch circuit are analyzed, and a single pole double throw switch composed of MOS transistors is designed. The simulation results show that the static comparator circuit has a delay of 56.2ns and a power consumption of 463nW, which meets the performance requirements of the system with low power consumption, while the switch circuit has a insertion loss of -0.64dB, an isolation of -45.8dB, a port echo loss of less than -21dB, and a good match of the circuit ports. The rectifying and stabilizing circuits are designed. In the design of rectifier diode, zero threshold MOS transistor is used instead of conventional MOS transistor, so high output voltage is obtained. Voltage stabilizing circuit consists of startup circuit, voltage reference source and error amplifier. In order to reduce power consumption, the starting circuit is disconnected after the subsequent circuit works normally, while the error amplifier uses a simple two-stage operational amplifier structure with low power consumption. The simulation results show that the stable voltage of 1.8 V can be supplied, and the circuit module in the label can work normally. The power consumption of the circuit is 3 渭 W. 3. The demodulation and modulation circuit of ASK is designed. In order to reduce the chip area, the reference voltage of hysteresis comparator in demodulation circuit is extracted from low-pass filter circuit to replace the traditional RC network circuit. The design of modulation circuit is based on backscattering principle. The simulation results show that the demodulation circuit can demodulate the modulated signal successfully under the 915MHz carrier frequency and the 40KHz modulation signal frequency, and the modulation circuit can add the label information into the carrier signal to complete the conversion of digital signal to analog signal. The power consumption of the two circuits is 1.2 渭 W and 130 nW, respectively.
【學(xué)位授予單位】：天津大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2016
【分類號】：TP391.44;TN402

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