The Principle and Progress of Dynamically Reconfigurable Com
發(fā)布時間:2021-01-23 09:51
With the emergence of new applications and the increasing cost of new semiconductor manufacturing technology, high energy-efficiency and flexibility are both critical for processors.Dynamically reconfigurable computing architecture, which has the both characteristics, is one of the most promising architectures for future processors.It has shown notable advantages in many important application fields, compared to conventional architectures.However, the fundamental reasons for the characteristics ...
【文章來源】:Chinese Journal of Electronics. 2020,29(04)
【文章頁數(shù)】:13 頁
【參考文獻】:
期刊論文
[1]A Fuzzy Logic Based Power-Efficient Run-Time Reconfigurable Multicore System[J]. Shaheryar Najam,Muhammad Yasir Qadri,Zohaib Najam,Jameel Ahmed,Nadia N.Qadri. Chinese Journal of Electronics. 2018(03)
[2]A High Energy-Efficient Reconfigurable VLIW Symmetric Cryptographic Processor with Loop Buffer Structure and Chain Processing Mechanism[J]. LI Wei,ZENG Xiaoyang,DAI Zibin,NAN Longmei,CHEN Tao,MA Chao. Chinese Journal of Electronics. 2017(06)
[3]A Novel Combinatorics-Based Reconfigurable Bit Permutation Network and Its Circuit Implementation[J]. SHAN Weiwei,CHEN Xin,LU Yinchao,LI Jie. Chinese Journal of Electronics. 2015(03)
[4]Efficient and flexible memory architecture to alleviate data and context bandwidth bottlenecks of coarse-grained reconfigurable arrays[J]. YANG Chen,LIU Lei Bo,YIN Shou Yi,WEI Shao Jun. Science China(Physics,Mechanics & Astronomy). 2014(12)
本文編號:2995011
【文章來源】:Chinese Journal of Electronics. 2020,29(04)
【文章頁數(shù)】:13 頁
【參考文獻】:
期刊論文
[1]A Fuzzy Logic Based Power-Efficient Run-Time Reconfigurable Multicore System[J]. Shaheryar Najam,Muhammad Yasir Qadri,Zohaib Najam,Jameel Ahmed,Nadia N.Qadri. Chinese Journal of Electronics. 2018(03)
[2]A High Energy-Efficient Reconfigurable VLIW Symmetric Cryptographic Processor with Loop Buffer Structure and Chain Processing Mechanism[J]. LI Wei,ZENG Xiaoyang,DAI Zibin,NAN Longmei,CHEN Tao,MA Chao. Chinese Journal of Electronics. 2017(06)
[3]A Novel Combinatorics-Based Reconfigurable Bit Permutation Network and Its Circuit Implementation[J]. SHAN Weiwei,CHEN Xin,LU Yinchao,LI Jie. Chinese Journal of Electronics. 2015(03)
[4]Efficient and flexible memory architecture to alleviate data and context bandwidth bottlenecks of coarse-grained reconfigurable arrays[J]. YANG Chen,LIU Lei Bo,YIN Shou Yi,WEI Shao Jun. Science China(Physics,Mechanics & Astronomy). 2014(12)
本文編號:2995011
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