面向低能耗的非精確異構多核上的運行時技術
發(fā)布時間:2018-05-26 21:42
本文選題:非精確計算 + 異構多核 ; 參考:《高技術通訊》2014年08期
【摘要】:為降低異構多核處理器芯片的能耗,為非精確異構多核平臺提出了一種基于分層調(diào)節(jié)器的硬件抽象和搜索方法。該方法首先將異構多核硬件及其非精確參數(shù)抽象為樹狀結構,其次使用能效分數(shù)標定調(diào)節(jié)器樹,最后在線搜索其路徑,為程序的每個算法獲得最佳的硬件及其參數(shù)配置。實驗表明,該方法能夠在滿足用戶精確度需求的前提下,相比于精確CPU核,平均降低40%的能耗,且能夠很好地適應精確度需求的變化。
[Abstract]:In order to reduce the energy consumption of heterogeneous multicore processor, a hardware abstraction and searching method based on hierarchical regulator is proposed for inexact heterogeneous multi-core platform. The method firstly abstracts heterogeneous multi-core hardware and its inexact parameters into a tree structure, then uses energy efficiency scores to calibrate the regulator tree, and finally searches its path online to obtain the best hardware and parameter configuration for each algorithm of the program. The experimental results show that the proposed method can reduce the energy consumption by 40% compared with the accurate CPU kernel on the premise of satisfying the user's accuracy requirements, and it can adapt to the change of the accuracy requirement.
【作者單位】: 中國科學院計算機體系結構國家重點實驗室;中國科學院計算技術研究所;中國科學院大學;
【基金】:核高基重大專項(2009ZX01028-002-003,2009ZX01029-001-003,2010ZX01036-001-002) 863計劃(2012AA012202,2012AA010901) 國家自然科學基金(61003064,61100163,61133004,61222204,61221062,61303158) 中科院先導專項(XDA06010403)資助項目
【分類號】:TP332
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本文編號:1938998
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