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分柵快閃存儲器的失效機(jī)理及性能提升方法研究

發(fā)布時(shí)間:2018-04-30 13:17

  本文選題:分柵快閃存儲器 + 擦除; 參考:《復(fù)旦大學(xué)》2012年碩士論文


【摘要】:作為非易失性半導(dǎo)體儲器的類型之一,分柵快閃存儲器具有高編程效率、低擦除電壓和無過擦除效應(yīng)的優(yōu)點(diǎn),因此外圍控制電路簡單。自發(fā)明以來,它已在低密度代碼存儲和嵌入式閃存領(lǐng)域得到了廣泛的應(yīng)用。由于分柵閃存產(chǎn)品的制造過程需要同時(shí)完成閃存單元和邏輯器件的集成,制造工藝相對復(fù)雜,工程師需要及時(shí)地根據(jù)閃存產(chǎn)品的良率反饋和失效原因作出制程的優(yōu)化和改進(jìn),因此對分柵閃存的失效機(jī)理進(jìn)行研究具有重要的意義。 本文介紹了0.18μm自對準(zhǔn)分柵閃存的器件結(jié)構(gòu)、工作原理、閃存單元的制造流程和測試流程,通過對分柵閃存不同失效類型的電性數(shù)據(jù)的分析,對所發(fā)生的常見失效(擦除、編程和編程串?dāng)_失效)進(jìn)行了分類和歸納,同時(shí)結(jié)合分柵閃存的擦除和編程模型,對不同的失效機(jī)理進(jìn)行了分析,并借助物理失效分析結(jié)果進(jìn)行了證實(shí)。 由于分柵閃存的編程和編程串?dāng)_的工作窗口之間存在著相互制約的關(guān)系,本文提出了一種評估閃存產(chǎn)品編程工作窗口的方法。以此為基礎(chǔ),通過VSS IMP實(shí)驗(yàn)對某閃存產(chǎn)品的編程工藝窗口進(jìn)行了優(yōu)化和改善。在客戶不愿改變閃存產(chǎn)品測試條件的情況下,通過實(shí)驗(yàn)手段,找到了最佳的VSS IMP1/2摻雜濃度參數(shù),使閃存產(chǎn)品的編程工作窗口盡量與測試條件相匹配,從而擴(kuò)大了產(chǎn)品的工藝窗口,穩(wěn)定了產(chǎn)品良率。
[Abstract]:As one of the types of non - volatile semiconductor memory devices , the split - gate flash memory has the advantages of high programming efficiency , low erasing voltage and no over - erase effect , so that the peripheral control circuit is simple . Since the manufacturing process of the split - gate flash memory product needs to complete the integration of the flash memory unit and the logic device at the same time , the manufacturing process is relatively complex , the engineer needs to make the optimization and improvement of the process according to the good rate feedback and the failure cause of the flash memory product , and therefore , the research on the failure mechanism of the split - gate flash memory is important .

This paper introduces the device structure , working principle , manufacturing flow and test flow of 0.18 渭m self - aligned split - gate flash memory . Through the analysis of the electrical data of different failure types of the split - gate flash memory , the common failures ( erase , programming and programming crosstalk failure ) have been classified and summarized . At the same time , the erase and programming model of the split - gate flash memory is combined to analyze the different failure mechanisms , and the results of the physical failure analysis are verified .

This paper presents a method for evaluating the programming process window of a flash memory product due to the mutual restriction between the programming of the split - gate flash memory and the working window of programming crosstalk . In this paper , the optimization and improvement of the programming process window of a flash memory product is presented by using the VSS IMP experiment . In the case of the customer unwilling to change the test conditions of the flash memory product , the optimal VSS IMP1 / 2 doping concentration parameter is found through the experiment method , so that the program working window of the flash memory product is matched with the test condition as much as possible , thereby enlarging the process window of the product and stabilizing the product yield .

【學(xué)位授予單位】:復(fù)旦大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2012
【分類號】:TP333

【參考文獻(xiàn)】

相關(guān)博士學(xué)位論文 前1條

1 陶凱;先進(jìn)分柵閃存器件集成制造的整合與優(yōu)化[D];中國科學(xué)院研究生院(上海微系統(tǒng)與信息技術(shù)研究所);2006年

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本文編號:1824709

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