本文選題：Java處理器　切入點(diǎn)：RISC　出處：《江南大學(xué)》2012年碩士論文

【摘要】：目前,移動(dòng)互聯(lián)網(wǎng)技術(shù)和市場(chǎng)都出現(xiàn)了爆炸式的增長(zhǎng),隨著蘋果和android手機(jī)為代表的嵌入式便攜設(shè)備的問(wèn)世,移動(dòng)互聯(lián)網(wǎng)大有代替桌面互聯(lián)網(wǎng)之勢(shì),充分說(shuō)明了嵌入式設(shè)備的發(fā)展對(duì)我們生活的影響之大。各種嵌入式產(chǎn)品更新?lián)Q代的速度日新月異,對(duì)嵌入式系統(tǒng)的開(kāi)發(fā)效率有非常高的要求。Java作為一種基于網(wǎng)絡(luò)應(yīng)用的語(yǔ)言,具有高效性、安全性、良好的可移植性及動(dòng)態(tài)性,因此研究人員迫切希望使用Java來(lái)進(jìn)行嵌入式軟件開(kāi)發(fā)。為了滿足軟件研發(fā)人員的需求,各種嵌入式實(shí)時(shí)Java平臺(tái)層出不窮。比較常規(guī)的實(shí)現(xiàn)平臺(tái)方式有解釋方式、提前編譯、即時(shí)編譯、Java硬件加速器、Java處理器等。通過(guò)比較各方式的優(yōu)缺點(diǎn),以Java處理器方式實(shí)現(xiàn)的嵌入式實(shí)時(shí)Java平臺(tái)以硬件直接執(zhí)行Java字節(jié)碼,執(zhí)行效率最高。 前面的工作中提出了一種32位Java處理器JPOR-32(Java Processor Optimized For RTSJ)的架構(gòu),并初步實(shí)現(xiàn)了部分部件。本文在此基礎(chǔ)上根據(jù)Java指令集的字節(jié)碼執(zhí)行流程,優(yōu)化了處理器架構(gòu),并完善及擴(kuò)展了各部件,最后將各模塊組合成完整的流水線處理器。具體工作如下: 1.增加了內(nèi)存模塊,多了一級(jí)訪存的流水段。內(nèi)存主要以類文件中數(shù)據(jù)結(jié)構(gòu)為參考實(shí)現(xiàn),可以存放預(yù)處理后的類文件,這樣使處理器能直接從外部讀取Java字節(jié)碼文件,還能支持跳轉(zhuǎn)分支指令對(duì)內(nèi)存進(jìn)行跳轉(zhuǎn)讀取。 2.添加了連接各模塊的控制單元,使處理器能進(jìn)行流水處理,包括控制所有指令進(jìn)行相同流水的三段:取指令、指令緩沖、譯碼,還有指令譯碼設(shè)置的48位控制信號(hào)根據(jù)不同指令控制執(zhí)行、訪存和寫回部件的操作。 3.除了在處理器上實(shí)現(xiàn)了簡(jiǎn)單Java指令,還以微指令方式實(shí)現(xiàn)了包括方法調(diào)用與返回等用硬件難以直接實(shí)現(xiàn)的復(fù)雜指令。 本文最終在JPOR-32上實(shí)現(xiàn)了85條Java指令,使用FPGA對(duì)處理器進(jìn)行了驗(yàn)證,對(duì)各指令和應(yīng)用程序的運(yùn)行時(shí)鐘進(jìn)行了檢測(cè)。實(shí)驗(yàn)結(jié)果表明了此處理器比其他Java處理器指令執(zhí)行周期更短,具有高性能并且其WCET可預(yù)測(cè)。
[Abstract]:At present, the mobile Internet technology and market have explosive growth. With the advent of embedded portable devices represented by Apple and android mobile phones, mobile Internet has the potential to replace desktop Internet.It fully shows that the development of embedded devices has a great impact on our lives.As a language based on network application, Java has high efficiency, security, good portability and dynamic.So researchers are eager to use Java for embedded software development.In order to meet the needs of software developers, embedded real-time Java platforms emerge in endlessly.The common implementation platform is interpreted, compiled in advance, and Java hardware accelerator / Java processor is compiled in real time.By comparing the advantages and disadvantages of each method, the embedded real-time Java platform implemented by Java processor can execute Java bytecode directly by hardware, and the execution efficiency is the highest.In the previous work, a 32-bit Java processor, JPOR-32(Java Processor Optimized For RTSJ, is proposed, and some components are implemented.On this basis, according to the bytecode execution flow of the Java instruction set, the processor architecture is optimized, and the components are improved and expanded. Finally, the modules are combined into a complete pipeline processor.The specific work is as follows:1.Added to the memory module, more than one level of memory income segment.The memory is mainly realized by reference to the data structure in the class file, which can store the preprocessed class file, so that the processor can directly read the Java bytecode file from the outside, and can also support the jump branch instruction to read the memory.2.A control unit connected to each module is added to enable the processor to handle income, including controlling all instructions to carry out the same three segments of income: take instructions, buffer instructions, decode them.The 48-bit control signal set by instruction decoding controls the operation of execution, memory access and write back components according to different instructions.3.In addition to the simple Java instructions implemented on the processor, complex instructions, including method call and return, which are difficult to implement directly by hardware, are implemented by microinstruction.In this paper, 85 Java instructions are implemented on JPOR-32, the processor is verified by FPGA, and the running clock of each instruction and application program is detected.Experimental results show that the processor has shorter instruction execution period, higher performance and more predictable WCET than other Java processors.
【學(xué)位授予單位】：江南大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2012
【分類號(hào)】：TP368.1;TP332

【參考文獻(xiàn)】

相關(guān)期刊論文 前1條

1 蘇超云;柴志雷;涂時(shí)亮;;實(shí)時(shí)Java平臺(tái)的類預(yù)處理器研究[J];計(jì)算機(jī)工程;2010年07期

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本文編號(hào)：1707319