本文選題：大數(shù)據(jù)　切入點：三維堆疊　出處：《國防科學(xué)技術(shù)大學(xué)》2014年碩士論文

【摘要】：目前,大數(shù)據(jù)應(yīng)用發(fā)展迅速,其具有與傳統(tǒng)應(yīng)用不同的數(shù)據(jù)特征,這給處理器的訪存性能提出了挑戰(zhàn),加大了計算性能和存儲性能之間的差異。三維堆疊存儲結(jié)構(gòu)以其低延遲、大容量、高帶寬等特點,有效緩解了存儲墻的問題,非易失存儲介質(zhì)除非易失性之外在容量和能耗上也優(yōu)勢明顯,其與三維堆疊技術(shù)結(jié)合形成的非易失三維堆疊存儲結(jié)構(gòu)已成為發(fā)展的必然。閃存作為目前最成熟的非易失存儲介質(zhì),更具有實際意義。本文據(jù)此重點研究針對大數(shù)據(jù)應(yīng)用的閃存三維堆疊存儲結(jié)構(gòu)。首先,本文根據(jù)三維堆疊存儲結(jié)構(gòu)的現(xiàn)狀,歸納出針對存儲層次、存儲器類型、處理器層和存儲器層之間的通信方式和面向大數(shù)據(jù)應(yīng)用這四個方面的三維堆疊存儲結(jié)構(gòu)的重點研究方向;主要分析了兩種不同存儲介質(zhì)的三維堆疊存儲結(jié)構(gòu):DRAM(動態(tài)隨機存取存儲器)堆疊和NVM(非易失性存儲器)堆疊,據(jù)此總結(jié)了三維堆疊存儲結(jié)構(gòu)的特點,并針對大數(shù)據(jù)應(yīng)用指出未來可能的研究思路。針對非易失三維堆疊存儲結(jié)構(gòu),本文重點介紹了閃存三維堆疊存儲結(jié)構(gòu),同時簡要介紹新型非易失堆疊存儲結(jié)構(gòu),并以此作為研究基礎(chǔ)。其次,利用模擬實現(xiàn)和測試的方法,本文對閃存三維堆疊存儲結(jié)構(gòu)的特性進行了分析,其中選取能反映出閃存特性和其作為非易失存儲介質(zhì)的通性作為測試變量,以訪存延遲作為結(jié)果進行測試。通過對多個測試數(shù)據(jù)的分析總結(jié),最終得到四個典型特性,主要體現(xiàn)在三維堆疊結(jié)構(gòu)的帶寬優(yōu)勢在大數(shù)據(jù)應(yīng)用上影響顯著;隨著帶寬優(yōu)勢的增加,閃存的讀寫和擦除延遲影響逐漸減少;閃存頁大小主要影響命中率,對延遲結(jié)果影響并不明顯;閃存容量對結(jié)果影響較大。同時也給出了下一步的存儲優(yōu)化點。之后,根據(jù)由于閃存和DRAM兩者不同的特性反映出的存儲優(yōu)化點,為了優(yōu)化原有的閃存堆疊存儲結(jié)構(gòu),充分利用兩種不同存儲介質(zhì)的特性,本文提出了兩個優(yōu)化策略,分別是粒度差異優(yōu)化策略和閃存層讀寫分區(qū)優(yōu)化策略,旨在進一步提高系統(tǒng)訪存性能,并據(jù)此給出了兩個策略的設(shè)計思路和具體實現(xiàn)等理論基礎(chǔ)。最后,本文對兩個策略的優(yōu)化效果進行了測試。通過對已有代碼進行修改和利用工具收集必要的信息,本文實現(xiàn)了一個能反映閃存三維堆疊存儲結(jié)構(gòu)模塊功能的簡單模擬器,通過模擬器和選取合適的實驗參數(shù),得到多個結(jié)果,實驗結(jié)果表明,兩個策略優(yōu)化了原有閃存三維堆疊存儲結(jié)構(gòu)下的處理器的訪存性能,并且在閃存層讀寫分區(qū)策略下,閃存的寫耐性也有一定的提升。在訪存延遲結(jié)果下,粒度差異策略提高性能達11.3%,讀寫分區(qū)策略達5.4%,兩個策略共同作用下,優(yōu)化效果顯著,性能提高了17.2%。綜上,本課題針對大數(shù)據(jù)應(yīng)用特征,主要對閃存三維堆疊存儲結(jié)構(gòu)進行了特性分析,并進行了優(yōu)化,對進一步研究具有重要借鑒意義。
[Abstract]:At present, the rapid development of large data applications, the data has different characteristics from traditional applications, this to the processor memory performance is challenged, increasing the difference between computing performance and storage performance. The 3D stacked memory structure with its large capacity, low latency, high bandwidth characteristics, effectively alleviate the memory wall problem nonvolatile storage medium, unless the volatile in capacity and energy consumption have obvious advantages, non-volatile storage three-dimensional stacked structure has become the inevitable development of the combination with 3D stacked technology. Flash memory as the most mature nonvolatile storage medium, has more practical significance. This paper focuses on the application of data flash three-dimensional stack storage structure. First of all, according to the present situation of the 3D stacked memory structure, summed up for the memory hierarchy, the type of memory, the processor between layer and layer through memory The key research direction of 3D stacked memory structure and channel way for big data applications of these four aspects; the main analysis of the three-dimensional stack storage structure with two different storage medium: DRAM (dynamic random access memory (NVM) and stacked non-volatile memory) stack, then summarizes the characteristics of 3D stack storage structure. According to the application of big data pointed out possible future research ideas. The nonvolatile three-dimensional stack storage structure, this paper introduces the 3D stacked flash storage structure, at the same time, this paper introduces a new type of nonvolatile storage stack structure, and as the basis of the research. Secondly, using the simulation method to implement and test, the characteristics of 3D flash the stack storage structure is analyzed, which can reflect the characteristics and selection of flash memory as non continuity nonvolatile storage medium is used as test variables, the memory latency as a node The fruit was tested. Through the analysis of multiple test data summary, finally got four typical characteristics, mainly reflected in the three-dimensional structure of bandwidth advantage in large data applications significantly affected; with the increase of bandwidth advantages, flash memory read and write and erase the effects of delayed decreasing; flash memory page size mainly influences the hit rate. The results of the delay effect is not obvious; the capacity of flash memory have great influence on the results. At the same time, the storage optimization of the next point is given. Then, according to the optimal storage characteristics of flash memory and DRAM both reflect the different, in order to optimize the structure of the original flash storage stack, making full use of characteristics of two kinds of storage medium. This paper puts forward two optimization strategies are granularity optimization strategy and flash layer read-write partition optimization strategy, to further improve the performance of memory system, and gives two strategies The design and implementation of the theoretical basis of this paper. Finally, the optimization results of two strategies were tested. Based on the existing code to modify and use tools to collect the necessary information, this paper implements a simple simulator can reflect the three-dimensional flash storage structure module function, select the suitable experimental parameters by the simulator and and get multiple results, the experimental results show that the two strategies to optimize the original three-dimensional structure of the flash storage processor memory performance, and in a flash memory read and write layer partition strategy, flash write resistance has a certain increase in memory latency results, the size difference strategy to improve performance by up to 11.3% read and write, partitioning strategy 5.4%, two interaction strategy, the optimization effect is obvious, to improve the performance of 17.2%. in this subject according to the application characteristics of big data, mainly for flash 3D stack The characteristics of the storage structure are analyzed and optimized, which is of great significance for further research.

【學(xué)位授予單位】：國防科學(xué)技術(shù)大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2014
【分類號】：TP333

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