本文關(guān)鍵詞：高性能嵌入式MCU內(nèi)核設(shè)計(jì)與功能擴(kuò)展　出處：《華北電力大學(xué)》2013年碩士論文　論文類型：學(xué)位論文

  更多相關(guān)文章： 微控制器 片上系統(tǒng) 8051核

【摘要】：隨著信息技術(shù)的發(fā)展,作為嵌入式系統(tǒng)的核心,微處理器以其靈活,功能強(qiáng)大等優(yōu)勢,已廣泛應(yīng)用在信息技術(shù)的各個領(lǐng)域。無論是家電產(chǎn)品和數(shù)字信號處理領(lǐng)域,還是衛(wèi)星發(fā)射導(dǎo)彈制導(dǎo)都離不開微處理器。嵌入式微控制器的典型代表是8051單片機(jī),這種8位(8根數(shù)據(jù)線,8位指令)的電子器件目前在嵌入式設(shè)備中仍然有著極其廣泛的應(yīng)用。微控制器的最大特點(diǎn)是單片化,體積大大減小,從而使功耗和成本下降、可靠性提高。 本課題的內(nèi)容是在研究與理解傳統(tǒng)80C51核的基礎(chǔ)上,通過引入流水線架構(gòu),對程序控制器進(jìn)行硬布線改造,并擴(kuò)展外圍功能接口,設(shè)計(jì)實(shí)現(xiàn)一款高性能嵌入式MCU HD8051。該MCU芯片內(nèi)部集成只讀存儲器(Flash ROM)、隨機(jī)存儲器(RAM)、定時/計(jì)數(shù)器(Timer/counter)、I/O(input/output)、串行口(UART)、乘累加(MAC)及12C控制器等各種必要功能和外設(shè)。 本文詳細(xì)闡述了HD8051單時鐘/機(jī)器周期的指令流水的實(shí)現(xiàn)方式,并對內(nèi)核中控制單元、算數(shù)邏輯運(yùn)算單元、定時器單元、串口傳輸單元、端口單元、存儲器寄存器控制單元及外圍擴(kuò)展功能接口乘累加器、12C的設(shè)計(jì)實(shí)現(xiàn)均做了詳盡的闡述。本文使用verilog語言對各功能單元與外圍接口進(jìn)行RTL描述。在完成設(shè)計(jì)后,通過modelsim對各功能單元與接口進(jìn)行仿真驗(yàn)證,仿真結(jié)果表明,所設(shè)計(jì)的MCU的各功能模塊的功能時序達(dá)到了設(shè)計(jì)要求,乘累加單元MAC的片內(nèi)集成使得MCU很好地滿足了現(xiàn)今控制領(lǐng)域?qū)Ω咚贁?shù)字信號的處理的迫切需求,同時12C控制器的引入豐富了MCU的應(yīng)用領(lǐng)域,通過擴(kuò)展此類功能接口也很好地體現(xiàn)出單片機(jī)向SOC過渡的發(fā)展趨勢。通過FPGA驗(yàn)證,與傳統(tǒng)12個周期的80C51內(nèi)核比較,在相同時鐘頻率下單周期指令運(yùn)行效率為原來的12倍；整個指令集平均運(yùn)行效率為原來8051的8倍左右,使8051兼容機(jī)系列進(jìn)入了8位高速單片機(jī)行列。
[Abstract]:With the development of information technology, as the core of embedded system, microprocessor is flexible and powerful. It has been widely used in all fields of information technology, whether it is home appliances and digital signal processing. The typical representative of embedded microcontroller is 8051 single chip microcomputer, which is 8 bits and 8 data lines. At present, the electronic devices of 8-bit instruction) are still widely used in embedded devices. The biggest characteristic of microcontroller is monolithic and greatly reduced in volume, thus reducing power consumption and cost, and improving reliability. Based on the research and understanding of the traditional 80C51 core, this paper introduces the pipeline architecture to improve the hardware wiring of the program controller and extend the peripheral functional interface. Design and implement a high-performance embedded MCU HD8051.This MCU chip has integrated read-only memory (RAM). Timing / counter / timer / counter / I / O / output / output, serial port / UART. Multiply the accumulator Mac) and 12 C controller and other necessary functions and peripherals. This paper describes the implementation of HD8051 single clock / machine cycle instruction income, and the kernel control unit, arithmetic logic operation unit, timer unit, serial transmission unit, port unit. The memory register control unit and the peripheral extended function interface multiply the accumulator. The design and implementation of 12C are described in detail. This paper uses verilog language to describe each function unit and peripheral interface by RTL. The simulation results of each functional unit and interface by modelsim show that the functional timing of each functional module of the designed MCU meets the design requirements. Intra-chip integration of MAC makes MCU meet the urgent need of high-speed digital signal processing in current control field, and the introduction of 12C controller enriches the application field of MCU. By extending this kind of functional interface, it also reflects the development trend of MCU to SOC. Through the verification of FPGA, it is compared with the traditional 80C51 kernel with 12 cycles. The operation efficiency of the order cycle instruction is 12 times that of the original one at the same clock frequency. The average operating efficiency of the whole instruction set is about 8 times that of the original 8051.
【學(xué)位授予單位】：華北電力大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2013
【分類號】：TP332

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