本文關(guān)鍵詞：艇載計(jì)算機(jī)接口控制單元的設(shè)計(jì)與實(shí)現(xiàn)　出處：《西安電子科技大學(xué)》2014年碩士論文　論文類型：學(xué)位論文

  更多相關(guān)文章： AFS1500 1553B AD轉(zhuǎn)換 DA轉(zhuǎn)換 多串口

【摘要】：飛艇是一種利用輕于空氣的氣體提供升力的飛行器。相對于飛機(jī)，其最大的優(yōu)勢是駐空時間長，同時具有造價(jià)低、可靠性高等優(yōu)點(diǎn)，近年來，飛艇已逐漸在軍事和民用領(lǐng)域得到廣泛應(yīng)用。隨著科學(xué)技術(shù)的發(fā)展，飛艇所擔(dān)負(fù)的任務(wù)也越來越多，相應(yīng)地飛艇上面所搭載的設(shè)備也越來越多。這些設(shè)備功能不同，通信接口協(xié)議也不同，于是開發(fā)一種能把這些設(shè)備連接到一個系統(tǒng)中，并能對它們進(jìn)行管理控制的艇載計(jì)算機(jī)成為必要。然而，艇載計(jì)算機(jī)是一個復(fù)雜的系統(tǒng)，，本文主要完成其中的一個部分即接口控制單元的設(shè)計(jì)與實(shí)現(xiàn)。 接口控制單元以ACTEl公司AFS1500型FPGA為核心控制芯片，能提供多種類、多通道的接口，這些接口包括64路AD接口、10路DA接口、8路串口、64路OC/DI/DO接口、2路CAN總線接口和2路1553B總線接口。 本課題根據(jù)接口控制單元的設(shè)計(jì)要求和性能指標(biāo)，完成了各接口信號的硬件設(shè)計(jì)和基于FPGA的邏輯設(shè)計(jì)。其中邏輯設(shè)計(jì)部分是重點(diǎn)，此部分詳細(xì)描述了各接口的邏輯控制是如何設(shè)計(jì)和實(shí)現(xiàn)的，如SPI接口、AD轉(zhuǎn)換、DA轉(zhuǎn)換、多串口通信、OC/DI/DO接口、CAN總線透傳和1553B接口等。文章的最后說明了接口控制單元的驅(qū)動開發(fā)，并以實(shí)測圖的方式展示了單元各接口的功能測試結(jié)果。
[Abstract]:Airship is a kind of aircraft which uses the lighter air gas to provide lift. Compared with the aircraft, its biggest advantage is long standing time, low cost, high reliability and so on. In recent years, airship has many advantages such as low cost, high reliability and so on. Airship has been widely used in military and civilian fields. With the development of science and technology, the task of airship is more and more. There are more and more devices on board the airship accordingly. The functions of these devices are different and the communication interface protocols are also different, so we have developed a system that can connect these devices to a system. It is necessary to manage and control them. However, the on-board computer is a complex system. In this paper, the design and implementation of an interface control unit is mainly completed. The interface control unit uses ACTEl AFS1500 FPGA as the core control chip, which can provide a variety of multi-channel interfaces. These interfaces include 64-channel AD interface. 10 channels DA interface 8 channels serial port 64 channel OC/DI/DO interface 2 CAN bus interface and 2 channel 1553B bus interface. According to the design requirements and performance index of the interface control unit, the hardware design of each interface signal and the logic design based on FPGA are completed. This part describes in detail how to design and implement the logic control of each interface, such as SPI interface, AD conversion DA conversion, multi-serial port communication and OC / DIP / do interface. CAN bus transmission and 1553B interface, etc. At the end of this paper, the driver development of interface control unit is explained, and the function test results of each interface of the unit are shown by the method of actual measurement diagram.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2014
【分類號】：V247;TP334.7

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