本文選題：多核GPU + 并行運(yùn)算�。� 參考：《杭州電子科技大學(xué)》2015年碩士論文

【摘要】：作為衡量一個(gè)虛擬裝配系統(tǒng)優(yōu)越與否的重要標(biāo)準(zhǔn)，，碰撞檢測(cè)問(wèn)題受到人們的廣泛關(guān)注。當(dāng)前，實(shí)時(shí)性和精確性是判斷碰撞檢測(cè)算法的關(guān)鍵標(biāo)準(zhǔn)，因此如何利用日漸成熟的計(jì)算機(jī)硬件的并行架構(gòu)，來(lái)實(shí)現(xiàn)復(fù)雜場(chǎng)景下的精確的實(shí)時(shí)碰撞檢測(cè)成為人們當(dāng)前的研究重點(diǎn)。 在復(fù)雜場(chǎng)景中，連續(xù)碰撞檢測(cè)（Continuous Collision Detection，CCD）依然很難做到實(shí)時(shí)效果。隨著CPU并行架構(gòu)的實(shí)現(xiàn)，本文提出了一種CPU多核加速的碰撞檢測(cè)算法來(lái)提高虛擬裝配系統(tǒng)性能。通過(guò)利用硬件的多核性能，提出了一個(gè)空間分解理論，然后利用動(dòng)態(tài)任務(wù)分配策略把碰撞檢測(cè)任務(wù)均衡的分配到所有內(nèi)核上，使每個(gè)內(nèi)核上的的任務(wù)負(fù)載均衡。最后通過(guò)數(shù)據(jù)分析，該算法可以有效提高碰撞檢測(cè)效率。 相較于具有較強(qiáng)邏輯計(jì)算能力CPU來(lái)說(shuō)，具有強(qiáng)大浮點(diǎn)計(jì)算能力的GPU在有龐大運(yùn)算量的裝配系統(tǒng)中更有優(yōu)勢(shì)。由于人們?cè)谶M(jìn)行數(shù)學(xué)建模時(shí)不可避免出現(xiàn)誤差，從而導(dǎo)致本不應(yīng)該有碰撞接觸的零部件出現(xiàn)重疊或者嵌套現(xiàn)象。 針對(duì)以上問(wèn)題，我們利用現(xiàn)代GPU強(qiáng)大的高密度計(jì)算能力及其多核的性能，提出了一種實(shí)時(shí)的GPU加速的并行碰撞檢測(cè)算法。主要工作內(nèi)容如下： （1）提出了一個(gè)新的基于GPU加速的并行碰撞處理框架，利用連續(xù)碰撞檢測(cè)保證物體在移動(dòng)過(guò)程中沒(méi)有碰撞遺漏現(xiàn)象。 （2）為了解決CPU與GPU之間由于帶寬限制所造成的數(shù)據(jù)吞吐量較小而引起的通信瓶頸問(wèn)題，改進(jìn)了基于碰撞流優(yōu)化的CCD方法，以改善碰撞檢測(cè)的整體性能，實(shí)現(xiàn)系統(tǒng)的實(shí)時(shí)效果。 （3）將離散碰撞檢測(cè)（Discrete Collision Detection，DCD）與連續(xù)碰撞檢測(cè)結(jié)合。把三角行碰撞檢測(cè)（Triangle Intersection Detection，TID）結(jié)合到當(dāng)前的基于CCD的多核碰撞檢測(cè)算法中，利用混合的碰撞檢測(cè)來(lái)避免由于建模誤差的緣故導(dǎo)致在初始化時(shí)彼此間有嵌套、重疊現(xiàn)象而無(wú)法移動(dòng)部件的問(wèn)題。
[Abstract]:As an important criterion to measure the superiority of a virtual assembly system, collision detection has been paid more and more attention. At present, real-time and accuracy are the key criteria for judging collision detection algorithms. Therefore, how to use the increasingly mature parallel architecture of computer hardware to achieve accurate real-time collision detection in complex scenes has become the focus of current research. In complex scenarios, continuous Collision detection is still difficult to achieve real-time effects. With the implementation of CPU parallel architecture, a CPU multi-core accelerated collision detection algorithm is proposed to improve the performance of virtual assembly system. By using the multi-core performance of hardware, a spatial decomposition theory is proposed, and then the collision detection task is evenly distributed to all kernels using dynamic task allocation strategy, which makes the task load balance on each kernel. Finally, through data analysis, the algorithm can effectively improve the efficiency of collision detection. Compared with CPU with strong logical computing power, GPU with strong floating-point computing capability has more advantages in assembly systems with large computational complexity. Due to the inevitable errors in mathematical modeling, there is overlap or nesting of parts which should not have collision contact. To solve the above problems, we propose a real-time parallel collision detection algorithm based on GPU acceleration using the powerful high density computing power of modern GPU and its multi-core performance. The main tasks are as follows: A new parallel collision processing framework based on GPU acceleration is proposed. Continuous collision detection is used to ensure that there is no collision omission in the moving process. In order to solve the communication bottleneck problem between CPU and GPU caused by the low data throughput caused by bandwidth limitation, the CCD method based on collision flow optimization is improved to improve the overall performance of collision detection and realize the real-time effect of the system. The discrete Collision Detection (DCD) is combined with continuous collision detection. In this paper, Triangle Intersection Detection (TID) is combined with the current multi-core collision detection algorithm based on CCD, and the hybrid collision detection is used to avoid nesting each other during initialization due to modeling errors. The problem of overlapping and immovable parts.
【學(xué)位授予單位】：杭州電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TG95;TP391.9

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