本文選題：容錯　切入點：自修復　出處：《南京航空航天大學》2016年碩士論文

【摘要】：空天應用中基于SRAM型現(xiàn)場可編程門陣列(Field Programmable Gate Array,FPGA)的電子系統(tǒng)易因輻射誘發(fā)各種軟故障和硬故障,故為保證任務的順利完成,系統(tǒng)必須具有較強的容錯能力。目前大部分系統(tǒng)容錯的研究工作側重于處理某一類故障,能同時處理軟故障和硬故障的研究成果較少。本文將三模冗余(Triple Modular Redundancy,TMR)、部分配置刷新和演化硬件(Evolvable Hardware,EHW)思想相結合,設計具有在線自修復能力的單芯片強容錯數(shù)字系統(tǒng)結構和故障修復機制,對軟故障和硬故障均有較好的處理能力。本文主要研究內(nèi)容如下:(1)分析了空天應用環(huán)境下SRAM型FPGA常見的故障類型,并通過分析目前FPGA常用容錯技術的優(yōu)缺點確定了本文的技術方案。介紹了Xilinx Virtex-6 ML605開發(fā)套件及其軟件開發(fā)環(huán)境概況。(2)將動態(tài)部分重構(Dynamic Partial Reconfiguration,DPR)技術和配置刷新技術相結合,設計了基于部分配置刷新的自主修復系統(tǒng),包括功能單元的預設計、片上可編程系統(tǒng)硬件平臺搭建、系統(tǒng)軟件設計、DPR設計、可配置刷新IP核定制。并通過實驗驗證了部分配置刷新技術對軟故障處理的有效性。(3)設計了基于虛擬可重構電路(Virtual Reconfigurable Circuit,VRC)的自演化修復系統(tǒng),包括VRC電路設計、可演化IP核定制和添加、系統(tǒng)硬件平臺搭建、系統(tǒng)軟件設計。并以2位乘法器為例在ML605開發(fā)套件對自演化修復系統(tǒng)進行了驗證。(4)設計了基于SRAM型FPGA的容錯系統(tǒng)總體結構,給出了系統(tǒng)的故障修復機制。設計了系統(tǒng)軟件,包括軟件整體架構、軟故障的部分配置刷新修復控制、硬故障的演化修復控制。在ML605開發(fā)套件上,分別以2位乘法器和Sobel邊緣檢測器的設計和實現(xiàn)為例,通過模擬故障注入的方式,驗證了系統(tǒng)結構和故障修復機制。其中軟故障均使用配置刷新技術修復,2位乘法器和Sobel邊緣檢測器的硬故障分別使用門級演化和函數(shù)級演化方式修復。實驗結果表明,本文系統(tǒng)對兩類故障均具有較好的處理能力。
[Abstract]:The electronic system based on SRAM Field Programmable Gate FPGA in space-space application is prone to various soft and hard faults caused by radiation, so to ensure the smooth completion of the task, Systems must have a strong fault tolerance capability. At present, most of the research work on fault tolerance in systems is focused on dealing with certain types of faults. There are few research results that can deal with both soft and hard faults. In this paper, the idea of triple Modular redundancy, partial configuration refresh and Evolvable hardware EHW are combined. A single chip strong fault-tolerant digital system structure and fault repair mechanism with on-line self-repair capability are designed. The main contents of this paper are as follows: (1) the common fault types of SRAM type FPGA in space-space application environment are analyzed. By analyzing the advantages and disadvantages of the common fault-tolerant technologies in FPGA, this paper determines the technical scheme of this paper, and introduces the Xilinx Virtex-6 ML605 development suite and its software development environment, which combines the dynamic Partial Reconfiguration with the configuration refresh technology. A self-repairing system based on partial configuration refresh is designed, including pre-design of function unit, hardware platform of on-chip programmable system, system software design and DPR design. The validity of partial configuration refresh technology for soft fault processing is verified by experiments. A self-evolving repair system based on virtual reconfigurable circuit virtual Reconfigurable circuit is designed, including the design of VRC circuit. The architecture of fault-tolerant system based on SRAM type FPGA is designed with the example of 2-bit multiplier in ML605 development suite to verify the self-evolution repair system. This paper presents the fault repair mechanism of the system, designs the system software, including the whole software architecture, the soft fault partial configuration refresh repair control, the hard fault evolution repair control. Taking the design and implementation of 2-bit multiplier and Sobel edge detector as examples, the fault injection is simulated. The system structure and fault repair mechanism are verified, in which soft faults are repaired by configuration refresh technique for 2-bit multiplier and Sobel edge detector by gate level evolution and function level evolution respectively. The experimental results show that, The system has better ability to deal with both kinds of faults.
【學位授予單位】：南京航空航天大學
【學位級別】：碩士
【學位授予年份】：2016
【分類號】：V446

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