本文選題：甚長基線干涉測量 + 數(shù)據(jù)標(biāo)準(zhǔn)�。� 參考：《上海應(yīng)用技術(shù)大學(xué)》2017年碩士論文

【摘要】：甚長基線干涉測量是20世紀(jì)60年代,末期發(fā)展起來的一種擁有高角分辨率的射電干涉測量技術(shù)。后來在天文領(lǐng)域內(nèi)得到廣泛的應(yīng)用。VLBI技術(shù)經(jīng)過多年的發(fā)展,已經(jīng)完善并建立了許多數(shù)據(jù)標(biāo)準(zhǔn)。這些標(biāo)準(zhǔn)使得各個VLBI機構(gòu)之間的數(shù)據(jù)格式的不兼容性逐漸縮小。目前,國際上正在實現(xiàn)從Mark 5B數(shù)據(jù)格式到VDIF數(shù)據(jù)格式的轉(zhuǎn)換,代表性的是美國Haystack天文臺Mark 6系統(tǒng),輸出VDIF數(shù)據(jù)格式。目前已經(jīng)被多個國家的天文機構(gòu)采用。國內(nèi)的VLBI觀測網(wǎng)也已經(jīng)采購了數(shù)臺Mark 6,準(zhǔn)備應(yīng)用于國際VLBI聯(lián)測和國內(nèi)VLBI陸態(tài)網(wǎng)等的觀測。對于每一次數(shù)據(jù)格式的轉(zhuǎn)變,其實質(zhì)是對數(shù)據(jù)記錄設(shè)備和數(shù)據(jù)回放設(shè)備同時進(jìn)行升級。對應(yīng)Mark系列記錄設(shè)備,也同時有對應(yīng)Mark系列的相關(guān)處理設(shè)備。目前國際上主流的開源軟件相關(guān)處理機DiFX也已經(jīng)支持VDIF數(shù)據(jù)格式。國內(nèi)探月工程測控系統(tǒng)VLBI測軌分系統(tǒng)也在積極開展VDIF數(shù)據(jù)格式的研究,并準(zhǔn)備應(yīng)用于下一期任務(wù)。為此,本文圍繞VLBI技術(shù),結(jié)合VDIF數(shù)據(jù)格式的特點,主要展開了以下幾個方面的研究:1)首先對VLBI技術(shù)相關(guān)背景進(jìn)行原理性研究;2)根據(jù)VLBI數(shù)據(jù)傳輸系統(tǒng)要求,研究符合VDIF數(shù)據(jù)格式特點的數(shù)據(jù)編幀模塊和數(shù)據(jù)預(yù)處理模塊;3)重點設(shè)計了基于VDIF數(shù)據(jù)格式的數(shù)據(jù)編幀模塊,從功能上把數(shù)據(jù)編幀模塊主要分解數(shù)據(jù)字產(chǎn)生模塊、數(shù)據(jù)字FIFO模塊、數(shù)據(jù)幀頭信息產(chǎn)生模塊、數(shù)據(jù)幀頭FIFO模塊、數(shù)據(jù)幀控制器模塊、數(shù)據(jù)幀F(xiàn)IFO模塊和輸出控制器模塊;4)重點設(shè)計了基于VDIF數(shù)據(jù)格式的數(shù)據(jù)預(yù)處理模塊,從功能上把數(shù)據(jù)預(yù)處理模塊主要分解去幀頭模塊、去幀頭后數(shù)據(jù)緩存模塊、扇入模塊、交叉選擇模塊和輸出FIFO模塊;5)最后對這兩個模塊進(jìn)行仿真驗證和測試。本文的所有模塊設(shè)計都是在ISE下采用VHDL語言編寫程序進(jìn)行設(shè)計的,在各個模塊以及整體仿真均正確無誤后,把程序下載到Xilinx公司生產(chǎn)的Spartan-6系列的XC6SLX16-2CSG324芯片中。經(jīng)測試驗證,數(shù)據(jù)編幀模塊和數(shù)據(jù)預(yù)處理模塊能夠很好的實現(xiàn)預(yù)期的設(shè)計要求。
[Abstract]:Very long baseline interferometry is a kind of radio interferometry with high angle resolution developed in the late 1960s. Later, extensive application of.VLBI technology in the field of astronomy has been developed for many years, and many data standards have been developed and established. These criteria make the data format between various VLBI mechanisms. Incompatibility is gradually shrinking. At present, the conversion from the Mark 5B data format to the VDIF data format is being realized. The representative is the Mark 6 system of the American Haystack Observatory, the output VDIF data format. Now it has been adopted by the astronomical institutions of many countries. The domestic VLBI observation network has also purchased several Mark 6 and is ready to apply to the country. Interviewing VLBI and domestic VLBI terrestrial network. For each data format, the essence of the transformation is to upgrade the data recording equipment and data playback equipment. Corresponding to the Mark series recording equipment, and the corresponding processing equipment for the corresponding Mark series. At present, the international mainstream open source software related processor DiFX has also been used. After supporting the VDIF data format, the VLBI rail measurement system of the measurement and control system of the domestic lunar exploration project is also actively carrying out the research on the VDIF data format and is ready to be applied to the next task. This paper, based on the VLBI technology and the characteristics of the VDIF data format, mainly launches the following research: 1) first of all, the related background of VLBI technology is carried out. Principle research; 2) according to the requirements of VLBI data transmission system, the data frame module and data preprocessing module conforming to the features of VDIF data format are studied. 3) the data frame module based on VDIF data format is designed, and the data coding module is mainly decomposed from the word generation module, the data word FIFO module and the data frame head information. The production module, the data frame head FIFO module, the data frame controller module, the data frame FIFO module and the output controller module; 4) the data preprocessing module based on the VDIF data format is designed. The data preprocessing module is mainly decomposed to the frame head module, the data cache module, the fan in module, the cross selection module and the cross selection module, and the data preprocessing module are mainly decomposed to the frame head module. The output FIFO module; 5) finally, the two modules are simulated and tested. All the modules of this paper are designed under the VHDL language program under the ISE. After all the modules and the whole simulation are correct, the program is downloaded to the XC6SLX16-2CSG324 chip of the Spartan-6 series produced by the Xilinx company. Test certificate, data framing module and data preprocessing module can achieve the desired design requirements very well.
【學(xué)位授予單位】：上海應(yīng)用技術(shù)大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2017
【分類號】：P228.6

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