Growing a silicon（Si） layer on top of stacked Si-germanium（Ge） compressive layer can introduce a tensile strain on the former, resulting in superior device characteristics. Such a structure can be used for high performance complementary metal-oxide-semiconductor（CMOS） circuits. Down scaling metal-oxide-semiconductor field-effect transistors（MOSFETs） into the deep submicron/nanometer regime forces the source（S） and drain（D） series resistance to become comparable with the channel resistance and th... 

【文章來源】：Journal of Central South University. 2017,24(06)EISCICSCD

【文章頁數(shù)】：12 頁

【文章目錄】：
1 Introduction
2 Theoretical details
    2.1 Threshold voltage
    2.2 Drain current
3 Computational methodology
    3.1 Mobility and drain current
    3.2 Voltage transfer characteristics
    3.3 Noise margin
4 Results and discussion
5 Conclusions


【參考文獻(xiàn)】：
期刊論文
[1]Effect of substrate doping on threshold voltages of buried channel pMOSFET based on strained-SiGe technology[J]. 王斌,張鶴鳴,胡輝勇,張玉明,周春宇,李妤晨.  Journal of Central South University. 2014(06)



本文編號：3615408