【摘要】：針對船舶自動識別系統(tǒng)(Automatic Identification System,AIS)中相鄰多個小區(qū)的同頻信號相互干擾、無法解調(diào)的問題,該文采用多天線接收混合信號,通過在FPGA上設(shè)計獨立成分分析(Independent Component Analysis,ICA)算法來對混合信號進行實時盲分離.為滿足實時性,文中用符號函數(shù)代替雙曲正切函數(shù)對樣點數(shù)據(jù)作非線性映射,簡化迭代運算;并將樣點數(shù)據(jù)分塊存儲,用于并行計算.同時實現(xiàn)了高精度特征分解(Eigen Value Decomposition,EVD),用于對混合數(shù)據(jù)進行白化.最后將設(shè)計的FPGA系統(tǒng)在Xilinx Isim中仿真,結(jié)果表明,主頻20MHz時,系統(tǒng)在850μs內(nèi)完成了從4路512點AIS混合信號中分離出了三路源信號.本文的設(shè)計也可應(yīng)用于雷達、聲納等可能存在同頻干擾的實時信號處理系統(tǒng).
[Abstract]:In order to solve the problem that the same frequency signals of adjacent cells in ship automatic recognition system (Automatic Identification System,AIS) interfere with each other and can not be Demodulated, this paper adopts multi-antenna to receive mixed signals, and designs an independent component analysis (Independent Component Analysis,ICA algorithm on FPGA to carry out real-time blind separation of mixed signals. In order to meet the real-time performance, the symbolic function is used instead of the hyperbolic tangent function to make nonlinear mapping of the sample point data to simplify the iterative operation, and the sample point data are stored in blocks for parallel computing. At the same time, the high precision feature decomposition (Eigen Value Decomposition,EVD is realized, which is used to whiten the mixed data. Finally, the designed FPGA system is simulated in Xilinx Isim. The results show that the system separates three source signals from 4 512point AIS mixed signals in 850 渭 s when the main frequency 20MHz is used. The design of this paper can also be applied to real-time signal processing systems with radar, Sonar and other possible co-frequency interference.
【作者單位】： 南開大學電子信息與光學工程學院;天津市光電傳感器與傳感網(wǎng)絡(luò)技術(shù)重點實驗室;
【基金】：國家自然科學基金(No.61571244,No.61501262) 天津市科技計劃項目(No.16YFZCSF00540)
【分類號】：TN791;U675.7

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