FPGA原型驗證平臺存儲系統(tǒng)的設計與實現(xiàn)
發(fā)布時間：2019-06-12 19:41
【摘要】：近半個世紀以來,社會需求一直在推動著集成電路產(chǎn)業(yè)不斷的飛速發(fā)展。隨著單個芯片上所集成的晶體管數(shù)目越來越多,集成電路的設計復雜度也越來越高。作為芯片設計流程中的關鍵環(huán)節(jié),功能驗證的難度也隨之不斷提高。如何保證驗證的正確性和高效性成為芯片設計流程中十分重要,但又充滿挑戰(zhàn)的課題。本文研究以主流的FPGA原型驗證平臺為對象,主要關注其存儲系統(tǒng)的設計與實現(xiàn)。文章設計和實現(xiàn)了FPGA原型驗證平臺內(nèi)部存儲系統(tǒng)DDR3控制器及外部存儲系統(tǒng)SD卡控制器,并結(jié)合工程應用設計了針對驗證平臺存儲系統(tǒng)的測試方案。本文的主要工作以及研究成果具體可分為以下三個方面:1、FPGA原型驗證平臺內(nèi)部存儲系統(tǒng)的設計與實現(xiàn)。作為兼具高容量、高速度等優(yōu)勢的存儲設備,DDR3在FPGA原型驗證平臺中的作用至關重要,操作系統(tǒng)和大規(guī)模測試程序都需要依賴DDR3存儲器運行。本文首先介紹了DDR3的結(jié)構(gòu)、特征以及工作過程等,然后實現(xiàn)了帶有AXI4總線接口的DDR3控制器。通過對DDR3控制器進行功能仿真和實際測試,文章證明了該控制器設計的正確性和高效性。2、FPGA原型驗證平臺外部存儲系統(tǒng)的設計與實現(xiàn)。SD卡以其極大的靈活性、很好的安全性、高存儲容量及高數(shù)據(jù)傳輸率等優(yōu)點在嵌入式系統(tǒng)中得到了廣泛的應用。FPGA原型驗證平臺也迫切需要高容量、高速度的外部存儲設備來存儲操作系統(tǒng)和測試程序。本文首先分析了SD卡的通信協(xié)議與APB總線協(xié)議,然后設計并實現(xiàn)了基于APB總線的SD卡控制器,通過在FPGA驗證板中進行實際測試,文章證明了該控制器設計的正確性和高效性。3、FPGA原型驗證平臺存儲系統(tǒng)測試。在FPGA原型驗證平臺中,其存儲系統(tǒng)為進行大規(guī)模、高速度的測試提供了基礎。為了對平臺中的存儲系統(tǒng)進行全面的功能和性能測試,文章提出了針對FPGA原型驗證平臺存儲系統(tǒng)的測試方案。然后,本文分析并選取了具有代表性的測試集。最后,文章詳細分析了FPGA原型驗證平臺中存儲系統(tǒng)的測試結(jié)果。這些結(jié)果直觀的表明了文章所構(gòu)建的FPGA原型驗證平臺中的存儲系統(tǒng)能夠高效、正確的工作。綜上所述,本文主要針對DDR3控制器、SD卡控制器進行了研究,并對搭建完畢的FPGA原型驗證平臺存儲系統(tǒng)進行了測試。本文的研究工作為FPGA原型驗證平臺的設計及應用提供了參考,具有很好的應用價值。
[Abstract]:For nearly half a century, social demand has been promoting the rapid development of integrated circuit industry. With the increasing number of transistors integrated on a single chip, the design complexity of integrated circuits is getting higher and higher. As a key link in the chip design process, the difficulty of functional verification is also increasing. How to ensure the correctness and efficiency of verification has become a very important but challenging topic in the chip design process. In this paper, the mainstream FPGA prototype verification platform is studied, and the design and implementation of its storage system are mainly concerned. In this paper, the internal storage system DDR3 controller and external storage system SD card controller of FPGA prototype verification platform are designed and implemented, and the test scheme of verification platform storage system is designed with engineering application. The main work and research results of this paper can be divided into the following three aspects: 1, the design and implementation of the internal storage system of FPGA prototype verification platform. As a storage device with high capacity and high speed, DDR3 plays an important role in FPGA prototype verification platform. Operating system and large-scale test program need to rely on DDR3 memory to run. In this paper, the structure, characteristics and working process of DDR3 are introduced, and then the DDR3 controller with AXI4 bus interface is implemented. Through functional simulation and practical test of DDR3 controller, this paper proves the correctness and efficiency of the controller design. 2, the design and implementation of external storage system of FPGA prototype verification platform. SD card has been widely used in embedded system because of its great flexibility, good security, high storage capacity and high data transmission rate. FPGA prototype verification platform also urgently needs high capacity. High speed external storage devices to store operating systems and test programs. In this paper, the communication protocol of SD card and APB bus protocol are analyzed, and then the SD card controller based on APB bus is designed and implemented. through the actual test in FPGA verification board, the correctness and efficiency of the controller design are proved. 3, FPGA prototype verification platform storage system test. In the FPGA prototype verification platform, its storage system provides the basis for large-scale and high-speed testing. In order to test the function and performance of the storage system in the platform, a test scheme for the storage system of the FPGA prototype verification platform is proposed in this paper. Then, this paper analyzes and selects the representative test set. Finally, the test results of storage system in FPGA prototype verification platform are analyzed in detail. These results intuitively show that the storage system in the FPGA prototype verification platform built in this paper can work efficiently and correctly. To sum up, this paper mainly studies the DDR3 controller and SD card controller, and tests the storage system of the FPGA prototype verification platform. The research work of this paper provides a reference for the design and application of FPGA prototype verification platform, and has good application value.
【學位授予單位】：國防科學技術(shù)大學
【學位級別】：碩士
【學位授予年份】：2015
【分類號】：TP333;TN791
本文編號：2498255
[Abstract]:For nearly half a century, social demand has been promoting the rapid development of integrated circuit industry. With the increasing number of transistors integrated on a single chip, the design complexity of integrated circuits is getting higher and higher. As a key link in the chip design process, the difficulty of functional verification is also increasing. How to ensure the correctness and efficiency of verification has become a very important but challenging topic in the chip design process. In this paper, the mainstream FPGA prototype verification platform is studied, and the design and implementation of its storage system are mainly concerned. In this paper, the internal storage system DDR3 controller and external storage system SD card controller of FPGA prototype verification platform are designed and implemented, and the test scheme of verification platform storage system is designed with engineering application. The main work and research results of this paper can be divided into the following three aspects: 1, the design and implementation of the internal storage system of FPGA prototype verification platform. As a storage device with high capacity and high speed, DDR3 plays an important role in FPGA prototype verification platform. Operating system and large-scale test program need to rely on DDR3 memory to run. In this paper, the structure, characteristics and working process of DDR3 are introduced, and then the DDR3 controller with AXI4 bus interface is implemented. Through functional simulation and practical test of DDR3 controller, this paper proves the correctness and efficiency of the controller design. 2, the design and implementation of external storage system of FPGA prototype verification platform. SD card has been widely used in embedded system because of its great flexibility, good security, high storage capacity and high data transmission rate. FPGA prototype verification platform also urgently needs high capacity. High speed external storage devices to store operating systems and test programs. In this paper, the communication protocol of SD card and APB bus protocol are analyzed, and then the SD card controller based on APB bus is designed and implemented. through the actual test in FPGA verification board, the correctness and efficiency of the controller design are proved. 3, FPGA prototype verification platform storage system test. In the FPGA prototype verification platform, its storage system provides the basis for large-scale and high-speed testing. In order to test the function and performance of the storage system in the platform, a test scheme for the storage system of the FPGA prototype verification platform is proposed in this paper. Then, this paper analyzes and selects the representative test set. Finally, the test results of storage system in FPGA prototype verification platform are analyzed in detail. These results intuitively show that the storage system in the FPGA prototype verification platform built in this paper can work efficiently and correctly. To sum up, this paper mainly studies the DDR3 controller and SD card controller, and tests the storage system of the FPGA prototype verification platform. The research work of this paper provides a reference for the design and application of FPGA prototype verification platform, and has good application value.
【學位授予單位】：國防科學技術(shù)大學
【學位級別】：碩士
【學位授予年份】：2015
【分類號】：TP333;TN791
【參考文獻】
相關博士學位論文 前1條
1 郇丹丹;高性能存儲系統(tǒng)研究[D];中國科學院研究生院（計算技術(shù)研究所）;2006年
相關碩士學位論文 前2條
1 戚鵬;多端口共享存儲器設計及其FPGA實現(xiàn)[D];西安電子科技大學;2011年
2 陳肯;DDRII SDRAM控制器設計實現(xiàn)[D];浙江大學;2007年
，本文編號：2498255
本文鏈接：http://sikaile.net/kejilunwen/dianzigongchenglunwen/2498255.html
最近更新
教材專著
