采用SMIC 0.13μm定制化工藝標(biāo)準(zhǔn)單元庫(kù)的TOF芯片專(zhuān)用TDC模塊設(shè)計(jì)
發(fā)布時(shí)間：2019-04-18 07:45
【摘要】：TOF(Time-of-Flight,飛行時(shí)間)芯片是一種精確測(cè)量場(chǎng)景深度信息的傳感器,廣泛應(yīng)用于軍事、航天航空、導(dǎo)航通信等國(guó)防建設(shè)的激光測(cè)距領(lǐng)域。由于TOF芯片使用單光子發(fā)射到遇物體而反射回來(lái)的時(shí)間來(lái)記錄衡量深度信息,因此單光子的飛行時(shí)間量化是TOF芯片的關(guān)鍵技術(shù)。時(shí)間相關(guān)單光子計(jì)數(shù)技術(shù)(Time-correlated single-photon counting,TCSPC)應(yīng)用于TOF芯片中,能夠?qū)w行時(shí)間通過(guò)時(shí)鐘計(jì)數(shù)的方式量化讀出,其精度的高低決定了芯片性能的好壞。時(shí)間數(shù)字轉(zhuǎn)換(Time-to-Digital Converter,TDC)電路是TCSPC技術(shù)的核心模塊。為了實(shí)現(xiàn)高精度的TDC電路,本文設(shè)計(jì)的TDC電路包括三個(gè)模塊,分別為T(mén)DC控制模塊,TDC測(cè)量模塊和TDC譯碼模塊。TDC控制模塊用于控制TDC測(cè)量模塊的工作狀態(tài)。TDC測(cè)量模塊采用三級(jí)結(jié)構(gòu):第一級(jí)TDC是采用時(shí)間周期計(jì)數(shù)法的粗精度測(cè)量,后兩級(jí)TDC是采用游標(biāo)型的細(xì)精度測(cè)量。TDC譯碼模塊利用本文創(chuàng)建的基于SMIC 0.13μm工藝的標(biāo)準(zhǔn)單元庫(kù)進(jìn)行半定制集成電路設(shè)計(jì)與版圖實(shí)現(xiàn)。本文采用的半定制集成電路設(shè)計(jì)流程為:首先進(jìn)行Verilog代碼定制譯碼模塊電路的程序,使用Modelsim工具進(jìn)行譯碼模塊功能仿真;然后定義基于SMIC 0.13μm工藝標(biāo)準(zhǔn)單元的規(guī)格和性能等參數(shù),設(shè)計(jì)單元的版圖并進(jìn)行驗(yàn)證,通過(guò)驗(yàn)證后將標(biāo)準(zhǔn)單元制作成用于數(shù)字后端工具的標(biāo)準(zhǔn)單元庫(kù);最后通過(guò)Synopsys工具的Design Compiler和IC Compiler進(jìn)行綜合和自動(dòng)布局布線(xiàn)完成TDC模塊電路的版圖設(shè)計(jì),并制成GDSII文件并在Cadence工具下進(jìn)行設(shè)計(jì)規(guī)則以及后仿真的驗(yàn)證。本文的設(shè)計(jì)成果包括:1)搭建TDC控制與測(cè)量模塊電路,設(shè)計(jì)三級(jí)測(cè)量結(jié)構(gòu)提高TDC電路的分辨率和精度。2)設(shè)計(jì)8種基本邏輯單元,構(gòu)成一個(gè)實(shí)用的SMIC 0.13μm標(biāo)準(zhǔn)單元庫(kù),并為每個(gè)標(biāo)準(zhǔn)單元設(shè)置了不同驅(qū)動(dòng)能力用于綜合和自動(dòng)布局布線(xiàn)時(shí)的時(shí)序優(yōu)化。3)在創(chuàng)建的標(biāo)準(zhǔn)單元庫(kù)在Synopsys的綜合工具和布局布線(xiàn)工具上進(jìn)行TDC模塊版圖的自動(dòng)生成,同時(shí)利用Cadence Virtuoso工具驗(yàn)證版圖的功能。
[Abstract]:TOF (time-of-flight) chip is a kind of sensor for accurate measurement of depth information of scene. It is widely used in the field of laser ranging in military, aerospace, navigation, communication and other national defense construction. Since the TOF chip records the depth information using the time of reflection from the single photon emission to the object, the quantization of the flight time of the single photon is the key technology of the TOF chip. Time-dependent single photon counting (Time-correlated single-photon counting,TCSPC) is used in TOF chip, and the flight time can be read out quantitatively by clock counting. Its precision determines the performance of the chip. Time-to-digital conversion (Time-to-Digital Converter,TDC) circuit is the core module of TCSPC technology. In order to realize the high precision TDC circuit, the TDC circuit designed in this paper includes three modules, which are the TDC control module, respectively. TDC measurement module and TDC decoding module. TDC control module is used to control the working status of TDC measurement module. TDC measurement module adopts three-level structure: the first stage TDC is coarse precision measurement using time period counting method. The latter two stages of TDC are fine precision measurement using cursors. TDC decoding module uses the standard cell library based on SMIC 0.13 渭 m process established in this paper to design the semi-custom integrated circuit and realize the layout. The design flow of semi-custom integrated circuit in this paper is as follows: firstly, the program of Verilog code custom decoding module circuit is carried out, and the function simulation of decoding module is carried out by using Modelsim tool; Then the specification and performance of SMIC 0.13 渭 m process standard unit are defined, and the layout of the unit is designed and verified. After the verification, the standard unit is made into a standard cell library for digital back-end tools. Finally, the layout design of TDC module circuit is completed by Design Compiler and IC Compiler of Synopsys tool, and the layout design of TDC module circuit is completed. The GDSII file is made, and the design rules and post-simulation are verified under the Cadence tool. The design results of this paper include: 1) build TDC control and measurement module circuit, design three-level measurement structure to improve the resolution and precision of TDC circuit. 2) Design 8 kinds of basic logic units to form a practical standard cell library of SMIC 0.13 渭 m. Different driving ability is set for each standard cell to optimize the timing of synthesis and automatic routing. 3) automatic generation of TDC module layout on Synopsys synthesis tool and layout tool is carried out in the created standard cell library. At the same time, the Cadence Virtuoso tool is used to verify the function of the layout.
【學(xué)位授予單位】：深圳大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類(lèi)號(hào)】：TN402
本文編號(hào)：2459872
[Abstract]:TOF (time-of-flight) chip is a kind of sensor for accurate measurement of depth information of scene. It is widely used in the field of laser ranging in military, aerospace, navigation, communication and other national defense construction. Since the TOF chip records the depth information using the time of reflection from the single photon emission to the object, the quantization of the flight time of the single photon is the key technology of the TOF chip. Time-dependent single photon counting (Time-correlated single-photon counting,TCSPC) is used in TOF chip, and the flight time can be read out quantitatively by clock counting. Its precision determines the performance of the chip. Time-to-digital conversion (Time-to-Digital Converter,TDC) circuit is the core module of TCSPC technology. In order to realize the high precision TDC circuit, the TDC circuit designed in this paper includes three modules, which are the TDC control module, respectively. TDC measurement module and TDC decoding module. TDC control module is used to control the working status of TDC measurement module. TDC measurement module adopts three-level structure: the first stage TDC is coarse precision measurement using time period counting method. The latter two stages of TDC are fine precision measurement using cursors. TDC decoding module uses the standard cell library based on SMIC 0.13 渭 m process established in this paper to design the semi-custom integrated circuit and realize the layout. The design flow of semi-custom integrated circuit in this paper is as follows: firstly, the program of Verilog code custom decoding module circuit is carried out, and the function simulation of decoding module is carried out by using Modelsim tool; Then the specification and performance of SMIC 0.13 渭 m process standard unit are defined, and the layout of the unit is designed and verified. After the verification, the standard unit is made into a standard cell library for digital back-end tools. Finally, the layout design of TDC module circuit is completed by Design Compiler and IC Compiler of Synopsys tool, and the layout design of TDC module circuit is completed. The GDSII file is made, and the design rules and post-simulation are verified under the Cadence tool. The design results of this paper include: 1) build TDC control and measurement module circuit, design three-level measurement structure to improve the resolution and precision of TDC circuit. 2) Design 8 kinds of basic logic units to form a practical standard cell library of SMIC 0.13 渭 m. Different driving ability is set for each standard cell to optimize the timing of synthesis and automatic routing. 3) automatic generation of TDC module layout on Synopsys synthesis tool and layout tool is carried out in the created standard cell library. At the same time, the Cadence Virtuoso tool is used to verify the function of the layout.
【學(xué)位授予單位】：深圳大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類(lèi)號(hào)】：TN402
【參考文獻(xiàn)】
相關(guān)期刊論文 前7條
1 ;中芯國(guó)際推出28納米HKMG制程與聯(lián)芯打造智能手機(jī)SoC芯片[J];電腦與電信;2016年Z1期
2 岱欽;耿岳;李業(yè)秋;張樂(lè);郝永平;;利用TDC-GP21的高精度激光脈沖飛行時(shí)間測(cè)量技術(shù)[J];紅外與激光工程;2013年07期
3 崔園園;王伯雄;柳建楠;李偉;;基于超聲波氣體傳感器的飛行時(shí)間測(cè)量系統(tǒng)[J];傳感器與微系統(tǒng);2013年06期
4 董明榮;許學(xué)忠;張彤;李家武;張敏;梁旭斌;;空中炸點(diǎn)三基陣聲學(xué)定位技術(shù)研究[J];兵工學(xué)報(bào);2010年03期
5 宋建輝;袁峰;丁振良;;脈沖激光測(cè)距中高精度時(shí)間間隔的測(cè)量[J];光學(xué)精密工程;2009年05期
6 李訓(xùn)根;羅小華;;標(biāo)準(zhǔn)單元工藝參數(shù)提取工具的設(shè)計(jì)及實(shí)現(xiàn)[J];微電子學(xué)與計(jì)算機(jī);2007年06期
7 翁壽松;摩爾定律與半導(dǎo)體設(shè)備[J];電子工業(yè)專(zhuān)用設(shè)備;2002年04期
，本文編號(hào)：2459872
本文鏈接：http://sikaile.net/kejilunwen/dianzigongchenglunwen/2459872.html
最近更新
教材專(zhuān)著
