數(shù);旌暇性化器CMOS電路設(shè)計
發(fā)布時間:2019-03-20 12:09
【摘要】:目前,無線通信系統(tǒng)朝著異構(gòu)網(wǎng)絡(luò)的形式發(fā)展,這引入了對宏基站和小基站的需求。宏基站實現(xiàn)廣域的基本覆蓋,在宏基站的盲點及數(shù)據(jù)流量較大的熱點區(qū)域,通過小基站進(jìn)行補(bǔ)充覆蓋并提高網(wǎng)絡(luò)容量。相比于宏基站,小基站的發(fā)射功率和覆蓋范圍較小,然而,基站中功率放大器的非線性并沒有得到相應(yīng)的減小。仍須通過線性化技術(shù)才能使功率放大器滿足高峰均比信號傳輸?shù)木性度要求。數(shù)字預(yù)失真技術(shù)(DPD)性能優(yōu)越,模擬預(yù)失真(APD)結(jié)構(gòu)簡單,而數(shù);旌暇性化技術(shù)結(jié)合兩者的優(yōu)點,并具有低于DPD的功耗和高于APD的線性化能力。由于這些特點,數(shù)模混合線性化技術(shù)將是本文研究的主要內(nèi)容。在混合線性化技術(shù)的驗證中,選取了無記憶多項式作為預(yù)失真器的模型;趶(fù)增益的查找表技術(shù),以輸入射頻信號的包絡(luò)信號功率作為查找表的索引值,得到矢量調(diào)制器的控制信號,然后用于調(diào)整輸入射頻信號的幅度及相位。通過系統(tǒng)的仿真驗證線性化效果,功率放大器的增益壓縮改善了0.8 dB,相位擴(kuò)張改善了10.3°。使用間隔為1 MHz的雙音信號,IMD3改善約32 dB,IMD5改善約18 dB。使用間隔為2 MHz的雙音信號,IMD3改善約27 dB,IMD5改善約15 dB。使用帶寬為3.84 MHz的CDMA2000調(diào)制信號,線性化后ACPR改善了15 dB。針對混合線性化系統(tǒng),本文設(shè)計一款基于0.13μm CMOS工藝的數(shù)字控制矢量調(diào)制器,完成了電路原理圖和版圖的設(shè)計。整個芯片尺寸為1080μm?886μm,通過前仿真和后仿真驗證了電路的性能,并初步驗證了線性化性能。矢量調(diào)制器由10-bits數(shù)字信號控制,電源電壓為1.2 V,電路靜態(tài)功耗為17.5 mW,在3~4 GHz頻段內(nèi),輸入、輸出端口的匹配良好(S11小于-22dB,S22小于-13 dB)。可實現(xiàn)的增益調(diào)節(jié)范圍為11dB,相位調(diào)節(jié)范圍為61°,噪聲系數(shù)小于13.2 dB。
[Abstract]:At present, the wireless communication system is developing to the form of heterogeneous network, which introduces the need of macro base station and small base station. Macro base stations realize wide area coverage. In the blind spots of macro base stations and hot spots with large data traffic, small base stations are used to supplement coverage and improve network capacity. Compared with macro base station, the transmission power and coverage range of small base station is smaller than that of macro base station. However, the nonlinearity of power amplifier in base station has not been reduced correspondingly. The linearization technique is still needed to make the power amplifier meet the linearity requirement of the peak-to-average ratio (PAPR) signal transmission. Digital pre-distortion technology (DPD) has the advantages of superior performance and simple structure of analog pre-distortion (APD), while digital-analog hybrid linearization technology combines the advantages of both, and has lower power consumption than DPD and higher linearization ability than APD. Because of these characteristics, digital-analog hybrid linearization technology will be the main content of this paper. In the verification of the hybrid linearization technique, the memoryless polynomial is selected as the model of the predistorter. Based on the complex gain lookup table technique, the power of the envelope signal of the input RF signal is used as the index value of the lookup table, and the control signal of the vector modulator is obtained, which is used to adjust the amplitude and phase of the input RF signal. The linearization effect is verified by the simulation of the system. The gain compression of the power amplifier is improved by 0.8 dB, phase expansion and improved by 10.3 擄. Using a dual tone signal with an interval of 1 MHz, the IMD3 improvement is about 32 dB,IMD5 and the improvement is about 18 dB. Using a dual tone signal at intervals of 2 MHz, the IMD3 improvement is about 27 dB,IMD5 and the improvement is about 15 dB. Using a 3.84 MHz CDMA2000 modulation signal, the linearized ACPR improved by 15 dB. For the hybrid linearization system, a digital control vector modulator based on 0.13 渭 m CMOS process is designed in this paper, and the circuit schematic and layout are designed. The whole chip size is 1080 渭 m-886 渭 m. The performance of the circuit is verified by pre-simulation and post-simulation, and the linearization performance is preliminarily verified. The vector modulator is controlled by the 10-bits digital signal, the power supply voltage is 1.2V, the static power consumption of the circuit is 17.5 mW, the input and output ports match well (S11 is less than-22dB, S22 is less than-13 dB). The realizable gain adjustment range is 11 dB, the phase adjustment range is 61 擄, and the noise figure is less than 13.2 dB..
【學(xué)位授予單位】:電子科技大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2017
【分類號】:TN432;TN761
本文編號:2444202
[Abstract]:At present, the wireless communication system is developing to the form of heterogeneous network, which introduces the need of macro base station and small base station. Macro base stations realize wide area coverage. In the blind spots of macro base stations and hot spots with large data traffic, small base stations are used to supplement coverage and improve network capacity. Compared with macro base station, the transmission power and coverage range of small base station is smaller than that of macro base station. However, the nonlinearity of power amplifier in base station has not been reduced correspondingly. The linearization technique is still needed to make the power amplifier meet the linearity requirement of the peak-to-average ratio (PAPR) signal transmission. Digital pre-distortion technology (DPD) has the advantages of superior performance and simple structure of analog pre-distortion (APD), while digital-analog hybrid linearization technology combines the advantages of both, and has lower power consumption than DPD and higher linearization ability than APD. Because of these characteristics, digital-analog hybrid linearization technology will be the main content of this paper. In the verification of the hybrid linearization technique, the memoryless polynomial is selected as the model of the predistorter. Based on the complex gain lookup table technique, the power of the envelope signal of the input RF signal is used as the index value of the lookup table, and the control signal of the vector modulator is obtained, which is used to adjust the amplitude and phase of the input RF signal. The linearization effect is verified by the simulation of the system. The gain compression of the power amplifier is improved by 0.8 dB, phase expansion and improved by 10.3 擄. Using a dual tone signal with an interval of 1 MHz, the IMD3 improvement is about 32 dB,IMD5 and the improvement is about 18 dB. Using a dual tone signal at intervals of 2 MHz, the IMD3 improvement is about 27 dB,IMD5 and the improvement is about 15 dB. Using a 3.84 MHz CDMA2000 modulation signal, the linearized ACPR improved by 15 dB. For the hybrid linearization system, a digital control vector modulator based on 0.13 渭 m CMOS process is designed in this paper, and the circuit schematic and layout are designed. The whole chip size is 1080 渭 m-886 渭 m. The performance of the circuit is verified by pre-simulation and post-simulation, and the linearization performance is preliminarily verified. The vector modulator is controlled by the 10-bits digital signal, the power supply voltage is 1.2V, the static power consumption of the circuit is 17.5 mW, the input and output ports match well (S11 is less than-22dB, S22 is less than-13 dB). The realizable gain adjustment range is 11 dB, the phase adjustment range is 61 擄, and the noise figure is less than 13.2 dB..
【學(xué)位授予單位】:電子科技大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2017
【分類號】:TN432;TN761
【參考文獻(xiàn)】
相關(guān)碩士學(xué)位論文 前3條
1 周睿;毫米波模擬預(yù)失真線性化技術(shù)研究[D];電子科技大學(xué);2013年
2 曹萍;基于矢量信號處理的射頻功放預(yù)失真技術(shù)研究[D];電子科技大學(xué);2012年
3 馬岳林;基于多項式求逆的數(shù)字預(yù)失真技術(shù)研究和測試驗證[D];電子科技大學(xué);2011年
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