基于FPGA的SCA芯片讀出方法與電路研究
[Abstract]:In nuclear radiation measurement, particles generate excitation, ionization, photomultiplier and other processes when they pass through the detector. The detector output signal contains a lot of physical information of the particle. Front-end electronics is connected to trigger detectors and data acquisition systems. However, with the development of modern particle physics and nuclear physics experiments, traditional front-end electronics have low integration and high costs. The low sampling rate can not meet the requirements of the future development of particle physics and nuclear physics experiments. There have been a number of ASIC chips designed for front-end electronics based on switched capacitor array (Switched Capacitor Array,SCA) in foreign countries, while the application research based on SCA ASIC chips in China is in the initial stage. So it is necessary to study the sampling principle based on switched capacitor array (ASIC) chip and its application in contemporary physics experiments. Aiming at the sampling technology of SCA chip DRS4, this paper studies the readout method and logic design of SCA chip based on FPGA, and develops a set of data acquisition control and acquisition software for upper computer specially used in array detector. The main work is as follows: the high-speed sampling technology for SCA chip DRS4 is carried out, and the logic design of DRS4 interface module, calibration module, ADC interface module and time sequence logic module is realized in programmable logic device (FPGA). And realize the data transmission with the upper computer. A set of software for data acquisition and control is designed. The software is developed on the platform of wx Widgets. The software communicates with the front-end electronics hardware through USB bus with modularization design idea and multi-thread technology. From the software architecture, command-line interface module, data acquisition and acquisition module, data processing module and graphical user interface, the design ideas and methods of upper computer software are discussed in detail. The linear interpolation algorithm, nonlinear interpolation algorithm and sine interpolation algorithm used in real-time sampling are studied. The time correction and amplitude calibration are realized by using sine wave zero-crossing algorithm and DC bias error compensation algorithm, respectively. Finally, the performance test and related correction algorithm verification of the DRS4 prototype are carried out, and the joint test with the scintillation crystal array detector is carried out. The test results show that this design can successfully cooperate with the debugging and testing work of the hardware satisfaction system.
【學(xué)位授予單位】:西北師范大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2015
【分類號(hào)】:TN791;TN402
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