基于MATLAB的射頻功放數(shù)字預(yù)失真方案設(shè)計(jì)與驗(yàn)證
發(fā)布時(shí)間：2018-10-31 11:27
【摘要】：射頻功放是無線通信中必不可少的組件,用于對信號功率進(jìn)行放大。由于射頻功放在提高信號功率的同時(shí),也會(huì)伴隨產(chǎn)生記憶非線性失真,因此,解決功放的記憶非線性失真特性顯得尤為關(guān)鍵。數(shù)字預(yù)失真具有高效和易于工程實(shí)現(xiàn)等優(yōu)點(diǎn),使其成為解決這一問題的普遍方法。本文使用MATLAB的SYSGEN模塊實(shí)現(xiàn)了一種構(gòu)造簡單、功放失真特性改善程度較好的數(shù)字預(yù)失真系統(tǒng)。主要內(nèi)容包括:第一,介紹了功率放大器的相關(guān)特征以及數(shù)字預(yù)失真的主要技術(shù)。通過理論分析以及MATLAB仿真比較幾種學(xué)習(xí)結(jié)構(gòu),選擇使用間接學(xué)習(xí)結(jié)構(gòu);比較了三種經(jīng)典的辨識算法模型,選擇使用實(shí)現(xiàn)和計(jì)算都較為簡單且開銷較小的最小均方自適應(yīng)(Least Mean Square,LMS)算法;比較幾種預(yù)失真器模型,選擇使用記憶多項(xiàng)式模型,并且在資源開銷與性能綜合考慮下選擇了記憶深度為3、非線性階數(shù)為5的實(shí)現(xiàn)方案。第二,根據(jù)選擇的模型與參數(shù),在SYSGEN平臺上搭建了數(shù)字預(yù)失真系統(tǒng)。該系統(tǒng)包括信號源、預(yù)失真器、功率放大器模型、正交調(diào)制/解調(diào)、數(shù)據(jù)緩存和預(yù)失真算法模塊。并且,在SYSGEN中使用的MCode模塊,可以直接調(diào)用.m文件進(jìn)行預(yù)失真算法的計(jì)算,并返回抽頭加權(quán)向量,極大地提高了建模的效率。第三,通過自主研發(fā)的軟件無線電平臺,對鏈路整體功能的正確性進(jìn)行了驗(yàn)證:通過FPGA內(nèi)部環(huán)回、FPGA夾層卡(FPGA Mezzanine Card,FMC)環(huán)回、射頻功放環(huán)回,測試數(shù)字預(yù)失真系統(tǒng)的改善效果。功放輸出的鄰道泄漏比(Adjacent Channel Leakage Ratio,ACLR)滿足3GPP關(guān)于ACLR小于-45d B的要求。證明了使用MATLAB的SYSGEN模塊設(shè)計(jì)數(shù)字預(yù)失真系統(tǒng)的方案基本可行。本文使用的SYSGEN實(shí)現(xiàn)方案不需要使用Verilog語言即可搭建鏈路并實(shí)現(xiàn)功能。大大降低了開發(fā)的成本。
[Abstract]:RF power amplifier is an essential component in wireless communication, which is used to amplify the signal power. Because RF power amplifier can not only improve the signal power, but also produce memory nonlinear distortion, so it is very important to solve the memory nonlinear distortion characteristic of power amplifier. Digital predistortion has the advantages of high efficiency and easy to be realized in engineering, which makes it a universal method to solve this problem. In this paper, a digital predistortion system with simple structure and improved distortion characteristic of power amplifier is implemented by using SYSGEN module of MATLAB. The main contents are as follows: first, the characteristics of power amplifier and the main technology of digital predistortion are introduced. Through theoretical analysis and MATLAB simulation several learning structures are compared and indirect learning structures are chosen. In this paper, three classical identification algorithms are compared, and the least mean square adaptive (Least Mean Square,LMS (MMSA) algorithm, which is easy to implement and compute, is chosen. Several predistorter models are compared, memory polynomial model is used, and memory depth is 3 and nonlinear order is 5 under the consideration of resource overhead and performance. Secondly, according to the selected model and parameters, a digital predistortion system is built on SYSGEN platform. The system includes signal source, predistorter, power amplifier model, quadrature modulation / demodulation, data buffer and predistortion algorithm module. Moreover, the MCode module used in SYSGEN can directly call the .m file to calculate the predistortion algorithm and return the tap weighting vector, which greatly improves the efficiency of modeling. Thirdly, the correctness of the whole link function is verified by the software radio platform developed by ourselves: through the FPGA internal loop, the FPGA sandwich card (FPGA Mezzanine Card,FMC loop, the RF power amplifier loop, Test the improvement of digital pre-distortion system. The adjacent channel leakage ratio (Adjacent Channel Leakage Ratio,ACLR) of the power amplifier output satisfies the 3GPP requirement that the ACLR is less than-45 dB. It is proved that the scheme of designing digital predistortion system with SYSGEN module of MATLAB is feasible. The SYSGEN implementation scheme in this paper does not need to use Verilog language to build the link and realize the function. The cost of development is greatly reduced.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2017
【分類號】：TN722.75
本文編號：2302015
[Abstract]:RF power amplifier is an essential component in wireless communication, which is used to amplify the signal power. Because RF power amplifier can not only improve the signal power, but also produce memory nonlinear distortion, so it is very important to solve the memory nonlinear distortion characteristic of power amplifier. Digital predistortion has the advantages of high efficiency and easy to be realized in engineering, which makes it a universal method to solve this problem. In this paper, a digital predistortion system with simple structure and improved distortion characteristic of power amplifier is implemented by using SYSGEN module of MATLAB. The main contents are as follows: first, the characteristics of power amplifier and the main technology of digital predistortion are introduced. Through theoretical analysis and MATLAB simulation several learning structures are compared and indirect learning structures are chosen. In this paper, three classical identification algorithms are compared, and the least mean square adaptive (Least Mean Square,LMS (MMSA) algorithm, which is easy to implement and compute, is chosen. Several predistorter models are compared, memory polynomial model is used, and memory depth is 3 and nonlinear order is 5 under the consideration of resource overhead and performance. Secondly, according to the selected model and parameters, a digital predistortion system is built on SYSGEN platform. The system includes signal source, predistorter, power amplifier model, quadrature modulation / demodulation, data buffer and predistortion algorithm module. Moreover, the MCode module used in SYSGEN can directly call the .m file to calculate the predistortion algorithm and return the tap weighting vector, which greatly improves the efficiency of modeling. Thirdly, the correctness of the whole link function is verified by the software radio platform developed by ourselves: through the FPGA internal loop, the FPGA sandwich card (FPGA Mezzanine Card,FMC loop, the RF power amplifier loop, Test the improvement of digital pre-distortion system. The adjacent channel leakage ratio (Adjacent Channel Leakage Ratio,ACLR) of the power amplifier output satisfies the 3GPP requirement that the ACLR is less than-45 dB. It is proved that the scheme of designing digital predistortion system with SYSGEN module of MATLAB is feasible. The SYSGEN implementation scheme in this paper does not need to use Verilog language to build the link and realize the function. The cost of development is greatly reduced.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2017
【分類號】：TN722.75
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