【摘要】：在101.6mm(4英寸)外延片上,研制出了大功率PIN限幅器芯片。根據(jù)大功率要求,優(yōu)化了GaAs PIN二極管的I層厚度和表面結(jié)構(gòu),建立了大、小信號模型,通過優(yōu)化設(shè)計(jì),使限幅器既能承受100 W的輸入功率,又有較低的插損。在8.5~10.5GHz內(nèi),測得該限幅器插入損耗約0.65dB,輸入輸出駐波≤1.5;當(dāng)限幅器輸入脈沖功率(9.5GHz,脈寬8ms、占空比40%)達(dá)50dBm(100 W)時,保持殼溫120℃,輸出漏功率最大18dBm,持續(xù)時間20min后,未見損壞。
[Abstract]:A high power PIN limiter chip has been developed on 101.6mm (4 inch) epitaxial wafer. According to the requirement of high power, I layer thickness and surface structure of GaAs PIN diode are optimized, and large and small signal models are established. By optimizing design, the limiter can withstand 100W input power and has low insertion loss. In 8.5~10.5GHz, the insertion loss of the limiter is about 0.65 dB, and the input and output standing wave is 鈮，

本文編號：2291223