基于位流回讀的FPGA測試系統(tǒng)的優(yōu)化方法研究
發(fā)布時間：2018-08-18 18:02
【摘要】：隨著當前半導體工藝的迅速發(fā)展,FPGA的復雜度和集成度也變得越來越高。隨之而來的測試成本和測試時間的大幅增加也讓FPGA可測性問題日漸凸顯。所以在當前集成度日益提高的發(fā)展趨勢下如何保證FPGA的可靠性顯得至關(guān)重要。而當前主流的FPGA測試方法有:傳統(tǒng)的硬件測試方法,基于ATE的測試方法,基于BIST的測試方法以及基于邊界掃描的測試方法等。這些測試方法既有各自不同的優(yōu)點,但也有明顯的缺陷。如傳統(tǒng)的硬件測試方法流程復雜并且耗時長,基于ATE的方法雖然速度快但成本高,而基于BIST的方法需要花費大量人力進行測試電路設(shè)計�；谶吔鐠呙璧姆椒ㄒ泊嬖贗O數(shù)目有限,測試速度較慢的缺點。所以找到一種成本低廉,具有較快測試速度的同時又切實可行的FPGA測試方法迫在眉睫。本論文從進一步推動FPGA測試技術(shù)的成熟出發(fā),以實驗室現(xiàn)有的基于位流回讀和邊界掃描的FPGA測試系統(tǒng)為基礎(chǔ),對測試系統(tǒng)面向的測試對象,測試系統(tǒng)的測試速度和測試系統(tǒng)自身可靠性和穩(wěn)定性以及測試系統(tǒng)的易用性進行優(yōu)化研究,推動該系統(tǒng)的進一步發(fā)展和成熟。并且通過將該測試系統(tǒng)移植到ARM嵌入式平臺中,拓寬了該系統(tǒng)的應(yīng)用領(lǐng)域,增強了該系統(tǒng)的靈活性和多樣性。本論文的主要內(nèi)容如下:(1)在大量查閱Xilinx公司相關(guān)技術(shù)文檔的基礎(chǔ)上,結(jié)合現(xiàn)有FPGA測試系統(tǒng),實現(xiàn)針對Virtex系列型號為XCV600,XCV1000和VirtexⅡ系列型號為XC2V1000和XC2V3000這四款FPGA的位流回讀和解析以及故障定位和診斷,并完成流程自動化。(2)在對部分位流回讀技術(shù)進行深入研究的基礎(chǔ)上實現(xiàn)針對CLB部分和BRAM部分的位流部分回讀。并將該技術(shù)在測試系統(tǒng)中實現(xiàn),以提高目前的測試速度。(3)在對現(xiàn)有FPGA測試系統(tǒng)反復研究的基礎(chǔ)上對系統(tǒng)的架構(gòu)和流程方面進行速度和可靠性的優(yōu)化,希望進一步推動該測試系統(tǒng)的成熟。(4)在現(xiàn)有FPGA測試系統(tǒng)的基礎(chǔ)上完成GUI圖形化界面的實現(xiàn),集成多種操作并具有不同工作模式,以達到提高系統(tǒng)易用性和測試效率的目的。(5)在針對PC版本的FPGA測試系統(tǒng)的基礎(chǔ)上,通過搭建硬件平臺和開發(fā)相應(yīng)程序,完成基于Zedbord開發(fā)板的嵌入式測試系統(tǒng)。
[Abstract]:With the rapid development of semiconductor technology, the complexity and integration of FPGA become higher and higher. The resulting significant increase in test costs and test time also makes FPGA testability issues increasingly prominent. Therefore, it is very important to ensure the reliability of FPGA under the trend of increasing integration. The current mainstream FPGA testing methods include: traditional hardware testing methods, testing methods based on ATE, testing methods based on BIST and testing methods based on boundary scan. These test methods have their own advantages, but also have obvious shortcomings. For example, the traditional hardware testing method is complex and time-consuming, the method based on ATE is fast but high cost, while the method based on BIST needs a lot of manpower to design the test circuit. The method based on boundary scan also has the disadvantage of limited IO number and slow test speed. Therefore, it is urgent to find a cheap, fast and feasible FPGA testing method. In order to further promote the maturity of FPGA testing technology, based on the existing FPGA test system based on bit stream read back and boundary scan, this paper presents the test object oriented to the test system. The test speed, the reliability and stability of the test system and the ease of use of the test system are optimized, which promotes the further development and maturity of the system. By transplanting the test system to the ARM embedded platform, the application field of the system is broadened, and the flexibility and diversity of the system are enhanced. The main contents of this thesis are as follows: (1) based on a large number of Xilinx technical documents, combined with the existing FPGA testing system, To realize bit stream read and resolution, fault location and diagnosis for the four FPGA models of Virtex series XCV600U XCV1000 and Virtex 鈪，
本文編號：2190253
[Abstract]:With the rapid development of semiconductor technology, the complexity and integration of FPGA become higher and higher. The resulting significant increase in test costs and test time also makes FPGA testability issues increasingly prominent. Therefore, it is very important to ensure the reliability of FPGA under the trend of increasing integration. The current mainstream FPGA testing methods include: traditional hardware testing methods, testing methods based on ATE, testing methods based on BIST and testing methods based on boundary scan. These test methods have their own advantages, but also have obvious shortcomings. For example, the traditional hardware testing method is complex and time-consuming, the method based on ATE is fast but high cost, while the method based on BIST needs a lot of manpower to design the test circuit. The method based on boundary scan also has the disadvantage of limited IO number and slow test speed. Therefore, it is urgent to find a cheap, fast and feasible FPGA testing method. In order to further promote the maturity of FPGA testing technology, based on the existing FPGA test system based on bit stream read back and boundary scan, this paper presents the test object oriented to the test system. The test speed, the reliability and stability of the test system and the ease of use of the test system are optimized, which promotes the further development and maturity of the system. By transplanting the test system to the ARM embedded platform, the application field of the system is broadened, and the flexibility and diversity of the system are enhanced. The main contents of this thesis are as follows: (1) based on a large number of Xilinx technical documents, combined with the existing FPGA testing system, To realize bit stream read and resolution, fault location and diagnosis for the four FPGA models of Virtex series XCV600U XCV1000 and Virtex 鈪，
本文編號：2190253
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