【摘要】：超大規(guī)模集成電路VLSI的快速發(fā)展促使芯片功能更加強(qiáng)大、尺寸更加微小,片上系統(tǒng)SOC(System on Chip)得到大量的推廣和使用。課題研究采用可編程邏輯器件FPGA對(duì)目標(biāo)系列SOC內(nèi)部Flash存儲(chǔ)器進(jìn)行讀寫(xiě)控制的設(shè)計(jì)與實(shí)現(xiàn),為SOC芯片廠商提供了一款專(zhuān)用的讀寫(xiě)工具,方便芯片流片(試生產(chǎn))過(guò)程中進(jìn)行功能與性能的測(cè)試以及量產(chǎn)SOC后寫(xiě)入最新數(shù)據(jù),有利于提高芯片開(kāi)發(fā)效率、縮短開(kāi)發(fā)周期、節(jié)約開(kāi)發(fā)成本。自從可燒錄IC問(wèn)世以來(lái),便改變了先前固定功能IC的格局,設(shè)計(jì)者能夠?qū)⑼环NIC備料燒錄成不同功能的IC,給設(shè)計(jì)廠商的IC庫(kù)存帶來(lái)了很大的靈活性�？蔁汭C需使用專(zhuān)門(mén)的燒錄設(shè)備或讀寫(xiě)控制系統(tǒng)進(jìn)行數(shù)據(jù)燒錄,燒錄設(shè)備主要有通用型和專(zhuān)用型兩種。通用型燒錄設(shè)備具有較好的兼容性,但價(jià)格比較昂貴,缺乏靈活性,IC設(shè)計(jì)廠商則可以把握自家芯片的共性,靈活設(shè)計(jì)配套的專(zhuān)用型讀寫(xiě)控制系統(tǒng),其功能設(shè)計(jì)靈活,成本低,具有較高的實(shí)用價(jià)值。論文針對(duì)目標(biāo)系列SOC,設(shè)計(jì)了一個(gè)專(zhuān)用的Flash讀寫(xiě)控制系統(tǒng)。設(shè)計(jì)充分利用專(zhuān)用型讀寫(xiě)測(cè)試工具設(shè)計(jì)的靈活性,最大限度滿(mǎn)足廠商設(shè)計(jì)需求。系統(tǒng)設(shè)計(jì)支持目標(biāo)SOC中多個(gè)Flash的操作,支持指定任意Block進(jìn)行操作,最小讀寫(xiě)操作單位是1 Word(4 Bytes)。設(shè)計(jì)提供了上位機(jī)與板級(jí)雙通道控制,使用更加便捷。由于芯片部分指令保密,設(shè)計(jì)提供了一個(gè)方便修改程序內(nèi)部數(shù)據(jù)的途徑,將MCU程序下載功能集成在系統(tǒng)的上位機(jī)中,省去調(diào)試器的使用,方便客戶(hù)修改指令參數(shù)。在該部分設(shè)計(jì)中,提出采用串口虛擬切換的方式,使得系統(tǒng)PC上位機(jī)能夠輕松切換對(duì)SOC操作與對(duì)MCU程序更新。為解決串口傳輸速率與目標(biāo)SOC操作速率不匹配的問(wèn)題,設(shè)計(jì)采用FPGA內(nèi)部Block RAM做緩存,保證數(shù)據(jù)讀寫(xiě)的正確與穩(wěn)定。系統(tǒng)設(shè)計(jì)為SOC提供了靈活的硬件接口,支持在脫機(jī)的情況下對(duì)SOC進(jìn)行讀寫(xiě)控制,使用靈活。課題研究最終實(shí)現(xiàn)了該讀寫(xiě)控制系統(tǒng),同時(shí),仿真驗(yàn)證與FPGA板級(jí)測(cè)試驗(yàn)證結(jié)果表明控制系統(tǒng)滿(mǎn)足設(shè)計(jì)要求。該設(shè)計(jì)作為一款專(zhuān)用型讀寫(xiě)工具,具有實(shí)際的使用價(jià)值。
[Abstract]:With the rapid development of VLSI (VLSI) VLSI, the chip becomes more powerful and smaller in size. SOC (System on Chip) is widely used and popularized. In this paper, the design and implementation of reading and writing control of SOC internal Flash memory using programmable logic device (FPGA) is studied, which provides a special reading and writing tool for SOC chip manufacturer. It is convenient to test the function and performance in the process of chip flow (trial production) and to write the latest data after mass production of SOC, which is helpful to improve the efficiency of chip development, shorten the development cycle and save the development cost. Since the invention of IC, the pattern of fixed function IC has been changed. The designer can burn the same IC into ICs with different functions, which brings a lot of flexibility to the IC inventory of the designer. It is necessary to use special recording equipment or read and write control system to burn data. There are two kinds of recording equipment: general type and special type. The universal burning equipment has good compatibility, but the price is expensive, the lack of flexibility can grasp the common characteristics of their own chips, flexible design of the matching specialized read-write control system, its functional design is flexible, low cost, It has high practical value. In this paper, a special Flash read and write control system is designed for the target series SOC. The design makes full use of the flexibility of the design of the special reading and writing testing tool to meet the design needs of the manufacturer to the maximum extent. The system design supports the operation of multiple Flash in the target SOC, and supports specifying any Block to operate. The minimum unit of read and write operation is 1 Word (4 Bytes). The design provides the upper computer and board-level dual-channel control, which is more convenient to use. Because of the secrecy of the instruction in the chip, the design provides a convenient way to modify the internal data of the program. The downloading function of the MCU program is integrated into the upper computer of the system, which saves the use of the debugger and makes it convenient for the client to modify the instruction parameters. In this part of the design, a serial port virtual switching mode is proposed, which makes the PC can easily switch the SOC operation and update the MCU program. In order to solve the mismatch between the serial transmission rate and the target SOC operation rate, the FPGA internal Block RAM is used as the buffer to ensure the correct and stable reading and writing of the data. The system provides a flexible hardware interface for SOC and supports SOC reading and writing control while offline. In this paper, the read-write control system is finally realized. At the same time, the results of simulation and FPGA board level test show that the control system meets the design requirements. As a special reading and writing tool, the design has practical value.
【學(xué)位授予單位】：武漢理工大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類(lèi)號(hào)】：TN47;TP273

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