基于LEON3和AXI總線的SoC搭建與驗證
發(fā)布時間：2018-07-20 15:14
【摘要】：隨著集成電路的發(fā)展,對集成電路集成度和性能的要求也越來越高,在這種趨勢下,在單個芯片上集成I/O設備、存儲器、處理器等成為當前電路集成的主要形式,片上系統(tǒng)SoC也就應運而生。以IP復用為基礎的SoC,以其集成度高、功耗低、體積小等優(yōu)點成為目前芯片技術的主要發(fā)展方向。首先,本文對LEON3進行了分析,其采用可擴展處理器體系架構,具有可配置可綜合的性質。另外LEON3具有全面的容錯措施來保證它的可靠性,采用二進程的設計方法,使得代碼的可讀性增強、抽取級更高、仿真時間變短。其次,本文對AMBA總線協(xié)議研究分析,并分別對AHB、APB、AXI總線的特性及其傳輸方式進行了詳細地總結。其中AXI總線作為AHB總線的擴展和延伸,保留了總線便于擴展、便于集成等優(yōu)點,擴展了總線的性能與靈活性。AXI總線適合高帶寬、高頻率、高性能設計,在SoC設計中提供更高的性能。通過研究,本文得出AHB、APB、AXI總線之間的聯(lián)系,研究如何實現(xiàn)它們之間的轉換方法。本文設計了橋接器來實現(xiàn)總線協(xié)議的轉換,其中通過狀態(tài)機、控制器、計數器、FIFO等方式控制信號的轉換來實現(xiàn)。根據不同總線協(xié)議之間的轉換,本文設計了AHB to AXI橋接器、AXI to APB橋接器、AXI to AHB橋接器三個不同的橋接器,來實現(xiàn)LEON3與AXI總線的連接。最后,本文根據研究和分析,先完成了基于LEON3的SoC搭建過程,并在此基礎上連接了實現(xiàn)將LEON3連接到AXI總線的橋接器,然后利用提供的軟件開發(fā)環(huán)境和硬件設計工具,通過軟硬件協(xié)同系統(tǒng)技術,實現(xiàn)基于LEON3和AXI總線的SoC的搭建。然后通過仿真工具ModelSim對所設計的橋接器進行仿真,驗證其功能。將所搭建的SoC下載到FPGA上來建立SoC的原型,通過控制程序對SoC中連接在AXI總線上的GPIO通用接口、TIMER定時器進行控制,來驗證基于LEON3和AXI總線的SoC的可行性。本文的結論說明通過所設計的橋接器可以實現(xiàn)基于LEON3和AXI總線的SoC的構建,在系統(tǒng)的驗證方面,通過在芯片上建立SoC的原型,編寫測試程序能達到理想的驗證效果,對所搭建的SoC實現(xiàn)了驗證,通過本文的研究有效地解決了LEON3與AXI總線連接的難題。
[Abstract]:With the development of integrated circuits, the integration and performance of integrated circuits are becoming more and more important. In this trend, the integration of I / O devices, memory and processors on a single chip becomes the main form of current circuit integration. SoC emerges as the times require. SoC based on IP reuse has become the main development direction of chip technology because of its advantages of high integration, low power consumption and small size. Firstly, this paper analyzes LEON3, which adopts extensible processor architecture and is configurable and comprehensive. In addition, LEON3 has a comprehensive fault-tolerant measure to ensure its reliability. By adopting the two-process design method, the readability of the code is enhanced, the extraction level is higher, and the simulation time is shortened. Secondly, the AMBA bus protocol is studied and analyzed in this paper, and the characteristic and transmission mode of AHBB bus are summarized in detail. AXI bus is the extension and extension of AHB bus, which retains the advantages of easy expansion and integration of the bus, and extends the performance and flexibility of the bus. AXI bus is suitable for the design of high bandwidth, high frequency and high performance. Provides higher performance in SoC design. In this paper, the relation between AHBs APBX and AXI bus is obtained, and how to realize the conversion between them is studied. In this paper, a bridge is designed to realize the conversion of bus protocol, which is controlled by state machine, controller, counter FIFO and so on. According to the conversion between different bus protocols, this paper designs three different bridges of AHB to AXI to APB bridge to realize the connection between LEON3 and AXI bus. Finally, according to the research and analysis, this paper first completes the SoC building process based on LEON3, and then connects the bridge to connect LEON3 to AXI bus, and then uses the software development environment and hardware design tools. SoC based on LEON3 and AXI bus is built by software and hardware co-system technology. Then the designed bridge is simulated by the simulation tool ModelSim to verify its function. The SoC is downloaded to FPGA to build the prototype of SoC, and the GPIO universal interface timer connected to AXI bus in SoC is controlled by the control program to verify the feasibility of SoC based on LEON3 and AXI bus. The conclusion of this paper shows that the SoC based on LEON3 and AXI bus can be constructed by the designed bridge. In the aspect of system verification, the test program can achieve the ideal verification effect by building the prototype of SoC on the chip. The SoC is validated, and the problem of connecting LEON3 to AXI bus is solved by the research in this paper.
【學位授予單位】：西安電子科技大學
【學位級別】：碩士
【學位授予年份】：2015
【分類號】：TN47
本文編號：2133941
[Abstract]:With the development of integrated circuits, the integration and performance of integrated circuits are becoming more and more important. In this trend, the integration of I / O devices, memory and processors on a single chip becomes the main form of current circuit integration. SoC emerges as the times require. SoC based on IP reuse has become the main development direction of chip technology because of its advantages of high integration, low power consumption and small size. Firstly, this paper analyzes LEON3, which adopts extensible processor architecture and is configurable and comprehensive. In addition, LEON3 has a comprehensive fault-tolerant measure to ensure its reliability. By adopting the two-process design method, the readability of the code is enhanced, the extraction level is higher, and the simulation time is shortened. Secondly, the AMBA bus protocol is studied and analyzed in this paper, and the characteristic and transmission mode of AHBB bus are summarized in detail. AXI bus is the extension and extension of AHB bus, which retains the advantages of easy expansion and integration of the bus, and extends the performance and flexibility of the bus. AXI bus is suitable for the design of high bandwidth, high frequency and high performance. Provides higher performance in SoC design. In this paper, the relation between AHBs APBX and AXI bus is obtained, and how to realize the conversion between them is studied. In this paper, a bridge is designed to realize the conversion of bus protocol, which is controlled by state machine, controller, counter FIFO and so on. According to the conversion between different bus protocols, this paper designs three different bridges of AHB to AXI to APB bridge to realize the connection between LEON3 and AXI bus. Finally, according to the research and analysis, this paper first completes the SoC building process based on LEON3, and then connects the bridge to connect LEON3 to AXI bus, and then uses the software development environment and hardware design tools. SoC based on LEON3 and AXI bus is built by software and hardware co-system technology. Then the designed bridge is simulated by the simulation tool ModelSim to verify its function. The SoC is downloaded to FPGA to build the prototype of SoC, and the GPIO universal interface timer connected to AXI bus in SoC is controlled by the control program to verify the feasibility of SoC based on LEON3 and AXI bus. The conclusion of this paper shows that the SoC based on LEON3 and AXI bus can be constructed by the designed bridge. In the aspect of system verification, the test program can achieve the ideal verification effect by building the prototype of SoC on the chip. The SoC is validated, and the problem of connecting LEON3 to AXI bus is solved by the research in this paper.
【學位授予單位】：西安電子科技大學
【學位級別】：碩士
【學位授予年份】：2015
【分類號】：TN47
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