本文選題：射頻內(nèi)建自測 + 坐標(biāo)旋轉(zhuǎn)數(shù)字計算機(jī)��； 參考：《西安電子科技大學(xué)學(xué)報》2017年04期

【摘要】：針對芯片射頻測試成本不斷提高的問題,提出了一種低成本片上系統(tǒng)射頻內(nèi)建自測電路結(jié)構(gòu)及其關(guān)鍵參數(shù)測量處理方法.此射頻內(nèi)建自測結(jié)構(gòu)著重利用片上已有數(shù)字信號處理器、坐標(biāo)旋轉(zhuǎn)數(shù)字計算機(jī)和模數(shù)轉(zhuǎn)換器對射頻測試信號進(jìn)行數(shù)字傅里葉變換,并利用低成本結(jié)構(gòu)進(jìn)行對數(shù)計算得到相應(yīng)的信噪比.另外,該自測結(jié)構(gòu)利用環(huán)回結(jié)構(gòu)設(shè)計,將射頻部分產(chǎn)生的信號用來作為測試信號而避免了外部噪聲的干擾.這種射頻內(nèi)建自測方法已經(jīng)成為一種有效的、低成本的設(shè)計方法,并用于新產(chǎn)品的量產(chǎn).相對于以往的射頻測試方法,該方法有效地減小了額外的硬件開銷,在保證測試質(zhì)量的情況下,降低了射頻電路的測試成本.
[Abstract]:In order to solve the problem that the cost of RF test on chip is increasing continuously, this paper presents a low cost RF built-in self-test circuit structure and its key parameter measurement and processing method in a low cost on-chip system. This RF built-in self-test structure focuses on digital Fourier transform of RF test signal using existing digital signal processor on chip, coordinate rotating digital computer and analog-to-digital converter. The signal-to-noise ratio (SNR) is obtained by using the low cost structure to calculate the logarithm. In addition, the loop structure is used to design the self-testing structure, and the RF signal is used as the test signal to avoid the external noise interference. This RF built-in self-test method has become an effective, low-cost design method and used in mass production of new products. Compared with the previous RF testing methods, the proposed method can effectively reduce the additional hardware overhead and reduce the test cost of RF circuits under the condition of ensuring the test quality.
【作者單位】： 西安電子科技大學(xué)微電子學(xué)院;
【基金】：國家自然科學(xué)基金資助項目(61376099,11235008)
【分類號】：TN407

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