本文選題：熱電制冷器 + 芯片��； 參考：《電子科技大學》2015年碩士論文

【摘要】：隨著電子元器件的微型化和集成化程度的提高,芯片單位面積中產(chǎn)生的熱量越來越多,且不同部位的產(chǎn)熱量也不均勻,因此,芯片中會不可避免地產(chǎn)生極高熱流密度的熱點。傳統(tǒng)的散熱方式在含有熱點的芯片散熱方面存在固有缺陷,無法去除芯片中熱點,而熱電制冷器(Thermoelectric Cooler:TEC)在芯片熱點這種熱量小且集中的散熱環(huán)境中具有獨特優(yōu)勢,但目前關于TEC在這方面的研究主要以追求性能為主,離實際應用還有較大距離,本文以一款已有的TEC(RMT公司:1MD06-021-03)展開,深入研究其工作性能以及在去除芯片熱點中的應用。本文首先根據(jù)TEC的工作原理建立其傳熱過程的數(shù)學模型,并通過仿真驗證該模型的準確性。為提高模型精度并擴大其應用范圍,對塞貝克系數(shù)、導熱系數(shù)及電阻等模型參數(shù)的溫度相關性進行研究,結果表明,塞貝克系數(shù)和導熱系數(shù)隨溫度的變化對模型精度的影響可以忽略,而在工作溫度范圍較大時須將電阻的溫度相關性考慮進模型中。除此之外,文中還研究了冷熱端邊界條件對TEC工作性能的影響,發(fā)現(xiàn)熱端傳熱熱阻的增加會減小TEC的最大工作電流值、最大冷熱端溫差及最大凈吸熱量,同時還會使TEC的性能系數(shù)降低;冷端熱載荷的增加同樣會導致TEC的性能系數(shù)和所能實現(xiàn)的最大溫差減小,但TEC的最大工作電流值會變大。然后,利用所建立的TEC模型,展開TEC去除芯片熱點的仿真研究。在傳熱熱阻RT=0K/W、熱點熱源直徑D1=0.5mm、功率密度為500W/cm2時,TEC的最大工作電流可以取到6A左右,而最佳工作電流則為3A,此時TEC恰好可以將熱點去除,與不使用TEC時相比,芯片的最大溫差由13.9℃降至3.2℃,其中4.9℃的溫降由TEC主動制冷所致。然而,隨著傳熱熱阻的增大,整個模型的溫度會升高,但對TEC的制冷能力和工作效率影響很小,并且當傳熱熱阻較大時,工作電流的增加并不能明顯增大TEC的制冷量,相反還會增大芯片的整體溫度。最后,設計并搭建了TEC去除芯片熱點的實驗平臺,對TEC在實際應用中的芯片熱點去除效果進行研究,結果表明TEC具有很好的熱點去除能力。
[Abstract]:With the increase of miniaturization and integration of electronic components, more and more heat is generated in the unit area of the chip, and the heat production in different parts is not uniform. Therefore, the hot spot of high heat flux will inevitably be produced in the chip. The traditional heat dissipation method has inherent defects in the heat dissipation of chips with hot spots, which cannot remove the hot spots in the chip, while the thermoelectric cooler: TECs have unique advantages in the small and concentrated heat dissipation environment of the hot spots of the chips. However, the current research on TEC in this area is mainly about performance, which is still far away from practical application. In this paper, an existing TEC(RMT company: 1 MD06-021-03) is used to deeply study its performance and its application in removing hot spots of chips. In this paper, the mathematical model of the heat transfer process of TEC is established according to its working principle, and the accuracy of the model is verified by simulation. In order to improve the precision of the model and expand its application range, the temperature dependence of the model parameters, such as Seebeck coefficient, thermal conductivity coefficient and resistance, is studied. The results show that, The influence of the variation of Seebeck coefficient and thermal conductivity with temperature on the precision of the model can be neglected, but the temperature dependence of resistance should be taken into account when the working temperature range is large. In addition, the influence of the boundary conditions on the performance of TEC is also studied. It is found that the increase of heat transfer resistance at the hot end will decrease the maximum operating current, the maximum temperature difference and the maximum net heat absorption of TEC. At the same time, the performance coefficient of TEC will be decreased, and the increase of thermal load at the cold end will also decrease the performance coefficient and the maximum temperature difference of TEC, but the maximum operating current of TEC will increase. Then, using the established TEC model, the simulation research of TEC removing hot spot is carried out. When the heat transfer resistance is 0 K / W, the diameter of hot spot heat source is 0. 5 mm, and the power density is about 6 A, the best working current is 3 A, and the TEC can remove the hot spot exactly, compared with the one without TEC. The maximum temperature difference of the chip was reduced from 13.9 鈩，

本文編號：1795660