本文選題：SPI　切入點：UVM　出處：《西安電子科技大學》2015年碩士論文　論文類型：學位論文

【摘要】：隨著SOC(System on Chip)設計規(guī)模的快速發(fā)展和IP(Intellectual Property)的大量采用,驗證已經(jīng)成為了制約芯片設計的瓶頸。驗證貫穿了整個芯片設計流程,高效的驗證既可以保證設計功能的正確性,又能提高設計的生產(chǎn)率,為加速芯片上市時間提供強有力的保障。驗證可以分為功能驗證和時序驗證兩大部分。本文主要研究的是SOC驗證的核心——數(shù)字功能驗證。首先調(diào)研當前SoC的背景,研究的目的與意義以及國內(nèi)外研究現(xiàn)狀。證明驗證的重要性。分析目前驗證面臨的挑戰(zhàn),總結(jié)當前主流的功能驗證技術(shù),提出應對這些挑戰(zhàn)所采用的一些驗證技術(shù)和方法,包括約束隨機驗證、覆蓋率驅(qū)動驗證和斷言等驗證方法。SystemVerilog驗證語言集成了面向?qū)ο缶幊桃约笆芗s束的隨機激勵,為功能驗證提供了強大的支持。UVM驗證方法學是以SystemVerilog為基礎(chǔ)所建立的一個庫,它提供了一系列的接口,使得驗證平臺的搭建變得簡單,從而能夠更方便的完成驗證。SPI是一種常用的標準串行接口,Si4432是一款高性能射頻收發(fā)器。本文以Si4432芯片中的SPI控制接口為基礎(chǔ)實現(xiàn)芯片的功能驗證。通過分析SPI協(xié)議,深入研究SPI的原理和基本結(jié)構(gòu),以及SPI工作模式、SPI傳輸模式。采用Verilog HDL語言完成了對SPI接口的設計。本文的重點是對設計的SPI進行功能驗證。先通過SPI的設計總結(jié)出了驗證平臺的主要架構(gòu),然后結(jié)合UVM驗證方法學設計并使用硬件驗證語言編寫了一個驗證平臺。最后對驗證平臺進行優(yōu)化。采用虛接口完成多種激勵的同步,使驗證平臺可以同時進行寄存器的配置和正常包的發(fā)送。其次改用FIFO的形式連接組件,主要使記分板能共主動接受數(shù)據(jù)。增加注入非正常激勵的功能,實現(xiàn)整個驗證平臺的完備性。通過回調(diào)的方式,完成對驅(qū)動器和監(jiān)視器的改進,使驗證平臺能夠用于多個項目設計中,從而提高了驗證平臺可重用性。本章最后對驗證平臺進行覆蓋率的測試。通過觀測功能覆蓋率來調(diào)整驗證激勵的生成方式,讓激勵盡可能完備,使代碼覆蓋率和功能覆蓋率都達到100%,實現(xiàn)驗證平臺的正確性并且完成對SPI設計的驗證。
[Abstract]:With the rapid development of SOC(System on chip design scale and the large adoption of IP(Intellectual property, verification has become the bottleneck of chip design. Can also improve the productivity of the design, The verification can be divided into two parts: functional verification and timing verification. This paper mainly studies the core of SOC verification-digital functional verification. Firstly, the background of current SoC is investigated. The purpose and significance of the research, the status quo of research at home and abroad, the importance of proof verification, the analysis of the challenges faced by the current verification, the summary of the current mainstream functional verification technologies, and some verification techniques and methods used to deal with these challenges are put forward. The verification methods, such as constrained random verification, coverage driven verification and assertion, integrate object-oriented programming and constrained random excitation. It provides powerful support for functional verification. UVM verification methodology is a library based on SystemVerilog. It provides a series of interfaces, which make it easy to build verification platform. Therefore, it is more convenient to complete verification. SPI is a common standard serial interface, Si4432 is a high performance RF transceiver. This paper realizes the functional verification of Si4432 chip based on the SPI control interface. By analyzing the SPI protocol, this paper analyzes the SPI protocol. Deeply study the principle and basic structure of SPI, The Verilog HDL language is used to complete the design of the SPI interface. The emphasis of this paper is to verify the function of the designed SPI. Firstly, the main framework of the verification platform is summarized through the design of the SPI. Then a verification platform is designed with UVM verification methodology and hardware verification language. Finally, the verification platform is optimized, and the virtual interface is used to complete the synchronization of various excitations. The verification platform can configure registers and send normal packets at the same time. Secondly, the components can be connected in the form of FIFO, so that the scorecard can accept the data actively and increase the function of injecting abnormal excitation. The implementation of the integrity of the entire verification platform. Through the callback way, complete the improvement of the driver and monitor, so that the verification platform can be used in multiple project design, In the end of this chapter, the coverage of the verification platform is tested. The generation of validation incentive is adjusted by the coverage of observation function to make the incentive as complete as possible. Make the code coverage and function coverage reach 100, verify the correctness of the platform and complete the verification of the SPI design.
【學位授予單位】：西安電子科技大學
【學位級別】：碩士
【學位授予年份】：2015
【分類號】：TN402

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相關(guān)碩士學位論文 前1條

1 柏才明;基于OVM的SoC功能驗證系統(tǒng)的設計與實現(xiàn)[D];華中科技大學;2011年

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本文編號：1588892