本文選題：PCI　切入點：仲裁　出處：《西安電子科技大學》2015年碩士論文　論文類型：學位論文

【摘要】：隨著集成電路的不斷發(fā)展,產(chǎn)品功能的多樣性和系統(tǒng)的復雜性,使得設計驗證必須更加嚴謹,我們必須更加努力的去保證設計的正確性。我們需要選擇合適的驗證方法和高效的驗證平臺,才能提高對復雜芯片驗證的效率。PCI總線,是系統(tǒng)中常用的總線之一,從低端的移動領域到高端的處理器,我們都可以找到它的應用。為了滿足應用要求,系統(tǒng)結構越來越復雜。但是,單一的PCI總線上,負載的設備數(shù)目是有限的。為了實現(xiàn)總線的擴展,通常使用橋設備,來形成分級的總線結構。為了能夠支持這種復雜的總線結構,提高總線使用的效率,我們需要一種靈活的仲裁方法,來分配總線的使用權。驗證工作,在當代集成電路設計中所占的時間和資源都遠大于設計工作。所以本文主要的工作量也集中在驗證部分。在建立驗證方案后,最重要的工作就是搭建驗證平臺。本文搭建的驗證平臺,不僅僅是針對仲裁模塊,而是適用于整個芯片的驗證平臺,需要能夠支持整個芯片的所有驗證工作。課題中對驗證平臺的結構、功能,和常用任務進行了詳細描述。搭建驗證平臺也是本文的主要工作。本文研究的對象是一款PCI-PCI總線橋,先從芯片的實際應用環(huán)境和基本功能入手,簡單介紹了相關的PCI協(xié)議。以固定優(yōu)先級算法和循環(huán)優(yōu)先級算法為基礎,對其內(nèi)部仲裁器算法進行研究。然后,從驗證方法學的角度,提出了驗證方案,并且建立了驗證平臺。最后使用Nc_verilog作為驗證工具,通過仿真驗證,驗證了芯片內(nèi)部仲裁器符合預期設計要求,根據(jù)覆蓋率信息分析了驗證工作的可靠性。并且對芯片初樣進行了部分參數(shù)的測試。本文主要內(nèi)容是第四章和第五章。主要的工作內(nèi)容是芯片驗證平臺的搭建和對芯片內(nèi)部仲裁器進行功能驗證。驗證平臺的建立和對芯片內(nèi)部仲裁器的驗證,為其他驗證工作和設計工作,提供了重要參考價值。最后,本文中的橋片,通過了Nc-verilog軟件進行的前仿驗證和后續(xù)的其他驗證工作。結果證明,本文所選用的驗證方式,滿足了預期的驗證要求。建立的驗證方案,覆蓋了芯片的功能驗證要求,對芯片進行了科學合理的驗證仿真。
[Abstract]:With the continuous development of integrated circuits, the variety of product functions and the complexity of the system, the design verification must be more rigorous. We must make more efforts to ensure the correctness of the design. We need to choose the appropriate verification method and efficient verification platform to improve the efficiency of the verification of complex chips. PCI bus is one of the commonly used buses in the system. From the low-end mobile field to the high-end processor, we can find its application. In order to meet the requirements of the application, the system structure is becoming more and more complex. However, on a single PCI bus, The number of loaded devices is limited. In order to achieve bus expansion, bridge devices are usually used to form a hierarchical bus structure. We need a flexible arbitration method to allocate the right to use the bus. The time and resources in the modern IC design are much larger than the design work. So the main workload of this paper is also concentrated in the verification part. The most important work is to build the verification platform. The verification platform built in this paper is not only for the arbitration module, but also for the entire chip verification platform. We need to be able to support all the verification work of the whole chip. The structure, function, and common tasks of the verification platform are described in detail in this paper. Building the verification platform is also the main work of this paper. The object of this paper is a PCI-PCI bus bridge. Starting with the practical application environment and basic functions of the chip, this paper briefly introduces the related PCI protocol. Based on the fixed priority algorithm and the cyclic priority algorithm, the internal arbiter algorithm is studied. From the point of view of verification methodology, the verification scheme is put forward, and the verification platform is established. Finally, Nc_verilog is used as the verification tool, and through simulation verification, it is verified that the internal arbiter of the chip meets the expected design requirements. The reliability of the verification is analyzed according to the coverage information, and some parameters of the chip are tested. The main contents of this paper are 4th and 5th chapters. The main work is the construction of the chip verification platform and the implementation of the chip verification platform. Verify the function of the internal arbiter of the chip, establish the verification platform and verify the internal arbiter of the chip, It provides an important reference value for other verification work and design work. Finally, the bridge piece in this paper has passed the pre-imitation verification and other subsequent verification work carried out by Nc-verilog software. The results show that the verification method chosen in this paper, The proposed verification scheme covers the functional verification requirements of the chip and makes a scientific and reasonable verification simulation of the chip.
【學位授予單位】：西安電子科技大學
【學位級別】：碩士
【學位授予年份】：2015
【分類號】：TN407

【參考文獻】

相關碩士學位論文 前1條

1 張亮;PCIe總線物理層的設計與驗證[D];西安電子科技大學;2013年

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本文編號：1586299