發(fā)布時(shí)間：2018-02-27 07:43

  本文關(guān)鍵詞： 功率MOSFET U-MOSFET 元胞 終端　出處：《西南交通大學(xué)》2015年碩士論文　論文類型：學(xué)位論文

【摘要】：功率MOSFET是功率電子系統(tǒng)中一個(gè)關(guān)鍵的元器件,它決定著控制系統(tǒng)的效率與成本。世界上至少50%的電力系統(tǒng)是由功率半導(dǎo)體器件作為控制。其在消費(fèi)電子、工業(yè)電子、醫(yī)療電子、航空航天與交通運(yùn)輸業(yè)等方面具有重要的影響。碳排放給環(huán)境帶來的負(fù)面影響與日俱增,對功率電子系統(tǒng)的效率與性能提出了更高的要求。溝槽型功率場效應(yīng)管(U-MOSFET)因其具有芯片面積小、導(dǎo)通電阻低、開關(guān)速度快等性能優(yōu)勢而廣受市場青睞。U-MOSFET器件的優(yōu)化設(shè)計(jì)、準(zhǔn)確的失效分析、高可靠性等是學(xué)術(shù)界與工業(yè)界研究的重點(diǎn)。本論文將主要對一款失效的60V U-MOSFET芯片進(jìn)行失效分析,并完成60VU-MOSFET芯片的高可靠性設(shè)計(jì)。具體研究內(nèi)容如下：(1)對失效的60V U-MOSFET芯片的流片測試數(shù)據(jù)進(jìn)行數(shù)值統(tǒng)計(jì)分析,得出芯片導(dǎo)通電阻指標(biāo)失效,初步定位60V U-MOSFET芯片失效在于芯片版圖設(shè)計(jì)與元胞設(shè)計(jì)。(2)分析60V U-MOSFET失效芯片版圖,結(jié)合版圖理論,排除由于版圖原因?qū)е率�。對元胞TEM圖進(jìn)行分析,建立元胞物理模型,對導(dǎo)通電阻進(jìn)行物理方程推導(dǎo),并結(jié)合數(shù)值仿真驗(yàn)證,得出60V U-MOSFET芯片失效原因來自于柵極溝槽兩邊的Pbody區(qū)在溝槽底部發(fā)生穿通,導(dǎo)致外延電阻局部增大,從而引起器件導(dǎo)通電阻失效。(3)在完成60V U-MOSFET芯片失效分析后,對60V U-MOSFET芯片的元胞與終端進(jìn)行重新優(yōu)化設(shè)計(jì),通過理論與仿真分別得到了導(dǎo)通電阻54353Ω、閾值電壓2.947V、耐壓81.2V的60V U-MOSFET元胞,和擊穿電壓68V的終端結(jié)構(gòu)。并通過將芯片硅體內(nèi)擊穿點(diǎn)限制在元胞與終端交界的Pbody區(qū),有效解決電壓從元胞向終端過渡引起的振蕩。(4)對重新設(shè)計(jì)的60V U-MOSFET芯片進(jìn)行版圖繪制,并進(jìn)行流片。通過對裸片與封裝測試數(shù)據(jù)的數(shù)值統(tǒng)計(jì)分析,最終得到閾值電壓2.959V、60V電壓下漏電流140.649nA、導(dǎo)通電阻2.77mQ,250/μA電流下?lián)舸╇妷?9.111V、柵極正向漏電流18.509nA、柵極反向漏電流10.305nA的60V U-MOSFET芯片。成功完成60V U-MOSFET芯片從仿真到流片的研發(fā)設(shè)計(jì)。
[Abstract]:Power MOSFET is a key component in power electronic systems, which determines the efficiency and cost of control systems. At least 50% of the world's power systems are controlled by power semiconductor devices. Aerospace and transportation have important impacts. The negative impact of carbon emissions on the environment is increasing. The efficiency and performance of power electronic system are required higher. Because of its advantages of small chip area, low on-resistance and fast switching speed, groove-type power field-effect transistor (PFTs) has been widely used in the market to optimize the design of .U-MOSFET devices. Accurate failure analysis, high reliability and so on are the focus of academic and industrial research. In this paper, a failure analysis of 60V U-MOSFET chip is carried out. And the high reliability design of 60VU-MOSFET chip is completed. The initial location of 60V U-MOSFET chip failure lies in chip layout design and cell design. (2) Analysis of 60V U-MOSFET chip layout. Combined with layout theory, the failure caused by layout is eliminated. The cellular TEM diagram is analyzed and a cellular physical model is established. The physical equation of the on-resistance is deduced, and the results of numerical simulation show that the failure of 60V U-MOSFET is due to the fact that the Pbody region on either side of the gate groove passes through at the bottom of the groove, which results in the local increase of the epitaxial resistance. After the failure analysis of 60V U-MOSFET chip is completed, the cell and terminal of 60V U-MOSFET chip are redesigned and optimized. The on-resistance 54353 惟, threshold voltage 2.947 V and voltage 81.2 V of 60V U-MOSFET cell are obtained by theory and simulation, respectively. And breakdown voltage 68V terminal structure. By limiting the breakdown point in the silicon chip to the Pbody region at the junction between the cell and the terminal, we can effectively solve the oscillation caused by the voltage transition from the cell to the terminal) and plot the layout of the redesigned 60V U-MOSFET chip. Through the numerical statistical analysis of the test data of the bare sheet and the package, Finally, a 60V U-MOSFET chip with a threshold voltage of 2.959V / 60 V and a breakdown voltage of 69.111V at a threshold voltage of 2.959V / 渭 A, a gate forward leakage current of 18.509nA and a gate reverse drain current of 10.305nA, was obtained. The 60V U-MOSFET chip was successfully developed from simulation to chip design.
【學(xué)位授予單位】：西南交通大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN386.1

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本文編號(hào)：1541760