本文關(guān)鍵詞： 信號(hào)完整性 復(fù)雜互連結(jié)構(gòu)模型 等效電路模型 故障測(cè)試　出處：《桂林電子科技大學(xué)》2015年碩士論文　論文類型：學(xué)位論文

【摘要】：隨著集成電路設(shè)計(jì)技術(shù)的飛速發(fā)展,電子工藝技術(shù)的不斷提高,各種新技術(shù)被用于電子系統(tǒng)的開發(fā)和設(shè)計(jì)中,與此同時(shí),高速電路中由過孔、焊點(diǎn)、印制線構(gòu)成的復(fù)雜互連結(jié)構(gòu)的信號(hào)完整性問題日趨嚴(yán)重。作為一整條傳輸路徑,過孔和焊點(diǎn)具有的不連續(xù)性和寄生效應(yīng),都會(huì)影響信號(hào)傳輸質(zhì)量,在裝配和生產(chǎn)過程中有可能出現(xiàn)的機(jī)械工藝故障更是會(huì)嚴(yán)重影響信號(hào)傳播。因此,對(duì)高速電路中由過孔、焊點(diǎn)、印制線構(gòu)成的復(fù)雜互連結(jié)構(gòu)的信號(hào)完整性進(jìn)行建模分析與故障測(cè)試方法的研究是十分有必要的。本文針對(duì)高速電路中的復(fù)雜互連結(jié)構(gòu)的信號(hào)完整性問題主要做了如下工作:1.根據(jù)信號(hào)完整性的相關(guān)理論,重點(diǎn)分析了信號(hào)完整性問題中的反射和串?dāng)_問題。2.建立了由過孔、焊點(diǎn)、印制線構(gòu)成的復(fù)雜互連結(jié)構(gòu)模型,針對(duì)復(fù)雜互連結(jié)構(gòu)模型的回波損耗和近端串?dāng)_進(jìn)行了仿真。分析對(duì)比了不同尺寸參數(shù)下的仿真結(jié)果,得出了不連續(xù)性的強(qiáng)弱表現(xiàn)是回波損耗的主要影響因素,耦合間距和耦合長(zhǎng)度是影響近端串?dāng)_的決定性因素的結(jié)論。3.基于傳輸線理論、高速電路理論等信號(hào)完整性基礎(chǔ)理論,提出了由過孔、焊點(diǎn)、印制線構(gòu)成的復(fù)雜互連結(jié)構(gòu)的等效電路模型,并通過電路仿真驗(yàn)證了模型的正確性。4.針對(duì)雙路徑復(fù)雜互連結(jié)構(gòu)進(jìn)行了故障測(cè)試,提出了故障電壓檢測(cè)法,針對(duì)過孔裂紋故障和焊點(diǎn)空洞故障進(jìn)行了實(shí)例驗(yàn)證,明確了故障電壓檢測(cè)法的優(yōu)缺點(diǎn),結(jié)果表明該測(cè)試方法可以對(duì)微小故障進(jìn)行有效的測(cè)試。
[Abstract]:With the rapid development of integrated circuit design technology and the continuous improvement of electronic technology, various new technologies have been used in the development and design of electronic system. As a whole transmission path, the discontinuity and parasitic effect of passing through holes and solder joints will affect the quality of signal transmission. The possible mechanical failure in assembly and production will seriously affect the signal propagation. Therefore, for high-speed circuits by the hole, solder joint, It is necessary to model and analyze the signal integrity of complex interconnect structure with printed line and to study the method of fault testing. In this paper, the signal integrity of complex interconnection structure in high speed circuit is studied. According to the theory of signal integrity, In this paper, the reflection and crosstalk problems in signal integrity are analyzed. 2. The complex interconnection structure model is established, which is composed of holes, solder joints and printed wires. The echo loss and near-end crosstalk of the complex interconnection structure model are simulated. The simulation results under different parameters are analyzed and compared. It is concluded that the performance of the discontinuity is the main factor affecting the echo loss. Conclusion 3. Based on the basic theory of signal integrity, such as transmission line theory, high-speed circuit theory, etc. The equivalent circuit model of complex interconnect structure constructed by printed line is proved to be correct by circuit simulation. 4. The fault test of complex interconnection structure with two paths is carried out, and the fault voltage detection method is proposed. The fault of hole crack and solder joint hole is verified by examples, and the advantages and disadvantages of fault voltage detection method are clarified. The results show that the method can be used to test micro-faults effectively.
【學(xué)位授予單位】：桂林電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN405.97

【引證文獻(xiàn)】

相關(guān)會(huì)議論文 前1條

1 駱再紅;石丹;高攸綱;;信號(hào)完整性問題中的串?dāng)_仿真及分析[A];電波科學(xué)學(xué)報(bào)[C];2011年

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本文編號(hào)：1541155