500V P溝VDMOS的設(shè)計(jì)
本文關(guān)鍵詞: 功率器件 P溝道VDMOS Tsuprem4Medici 擊穿電壓 出處:《電子科技大學(xué)》2015年碩士論文 論文類型:學(xué)位論文
【摘要】:VDMOS是將微電子技術(shù)和電力電子技術(shù)融合起來誕生的新一代功率半導(dǎo)體器件。其不僅具有傳統(tǒng)MOS的開關(guān)速度快、驅(qū)動(dòng)功率小、負(fù)溫度系數(shù)等優(yōu)點(diǎn),而且還擁有高擊穿電壓、低導(dǎo)通電阻、高可靠性等性能。由于具備了上述技術(shù)特點(diǎn),VDMOS在開關(guān)電源、電機(jī)控制、射頻通信、音頻放大器、高頻振蕩器、不間斷電源、節(jié)能燈、有源功率因數(shù)校正、逆變器等領(lǐng)域得到了廣泛應(yīng)用。但是在航空、航天和新能源領(lǐng)域應(yīng)用,P溝道VDMOS器件擁有不能被N溝道VDMOS所能取代的優(yōu)點(diǎn),比如較強(qiáng)的抗輻照能力。且P溝道和N溝道VDMOS器件結(jié)合使用可以優(yōu)化電路布局,提升電路性能。目前國內(nèi)大功率的P溝道VDMOS絕大部分依賴進(jìn)口。于是,研發(fā)完全基于國內(nèi)生產(chǎn)線工藝水平的大功率P溝道VDMOS是刻不容緩的事情,且具有重大的現(xiàn)實(shí)意義。本論文在與國內(nèi)某知名單位的合作項(xiàng)目基礎(chǔ)上,進(jìn)行500 V耐壓的P溝道VDMOS的設(shè)計(jì)。主要參數(shù)指標(biāo):擊穿電壓為-500 V,閾值電壓為-3~-5 V,導(dǎo)通電阻小于等于4.9?。依托合作方生產(chǎn)線進(jìn)行高壓P溝道VDMOS的工藝開發(fā),同時(shí)進(jìn)行該器件的元胞和終端設(shè)計(jì),最后流片測試分析及優(yōu)化。本論文的主要內(nèi)容如下:1、參考國外對(duì)應(yīng)產(chǎn)品手冊及項(xiàng)目合作方的0.5微米六T生產(chǎn)線,建立了產(chǎn)品的工藝制程,確定了產(chǎn)品基本參數(shù)指標(biāo);結(jié)合二維仿真器Tsuprem4Medici進(jìn)行了工藝和器件的聯(lián)合仿真,包括靜態(tài)參數(shù)和動(dòng)態(tài)參數(shù);經(jīng)過仿真優(yōu)化后確定了器件結(jié)構(gòu)參數(shù)和工藝參數(shù)。仿真結(jié)果,擊穿電壓為-527 V,閾值電壓為-3.6 V,特征導(dǎo)通電阻0.192Ω·cm2,開啟時(shí)間為85 ns,關(guān)斷時(shí)間為140 ns,輸入電容為567 nF,輸出電容為58 nF,反向傳輸電容為11 nF,體二極管反向恢復(fù)時(shí)間為150 ns;仿真結(jié)果均滿足器件各設(shè)計(jì)參數(shù)指標(biāo)。2、結(jié)合工藝線的機(jī)臺(tái)能力(如腐蝕方法、光刻精度等),繪制了該產(chǎn)品版圖;從材料角度和Nbody的注入劑量等幾個(gè)方面進(jìn)行工藝條件分片,完成流片后進(jìn)行測試分析,將測試結(jié)果與設(shè)計(jì)目標(biāo)參數(shù)對(duì)比發(fā)現(xiàn)靜態(tài)參數(shù)和動(dòng)態(tài)滿參數(shù)基本滿足要求,但動(dòng)態(tài)參數(shù)余量較小。3、最后進(jìn)行流片總結(jié),為后續(xù)改善芯片特性、完成芯片從樣品到產(chǎn)品質(zhì)的飛躍提供充足的數(shù)據(jù)資料支持。
[Abstract]:VDMOS is a new generation of power semiconductor devices which combines microelectronics technology with power electronics technology. It not only has the advantages of fast switching speed, low driving power and negative temperature coefficient of traditional MOS. It also has high breakdown voltage, low on-resistance, high reliability and so on. Because of the above technical features, VDMOS in switching power supply, motor control, radio frequency communication, audio amplifier, high-frequency oscillator. Uninterruptible power supply, energy-saving lamp, active power factor correction, inverter and other fields have been widely used, but in aviation, aerospace and new energy applications. P-channel VDMOS devices have advantages that can not be replaced by N-channel VDMOS, such as strong radiation resistance, and the combination of P-channel and N-channel VDMOS devices can optimize the circuit layout. Improve the performance of the circuit. At present, most of the domestic high-power P-channel VDMOS rely on imports. It is urgent to develop high-power P-channel VDMOS based on the domestic production line technology level, and it is of great practical significance. This paper is based on the cooperation project with a well-known unit in China. Design of 500V voltage-resistant P-channel VDMOS. Main parameters: breakdown voltage of -500V, threshold voltage of -3ng-5V, on-resistance of less than 4.9? The process of high-voltage P-channel VDMOS is developed based on the cooperative production line, and the cell and terminal design of the device is carried out. Finally, the flow sheet is tested and optimized. The main contents of this thesis are as follows: 1. Referring to the foreign product manual and the 0.5 micron six-T production line of the project partner, the process of the product is established, and the basic parameters of the product are determined. Combined with two-dimensional simulator Tsuprem4Medici, the process and device are simulated, including static and dynamic parameters. The simulation results show that the breakdown voltage is -527V, the threshold voltage is -3.6V, and the characteristic on-resistance is 0.192 惟 路cm2. The opening time is 85 ns, the turn-off time is 140 ns, the input capacitance is 567 nF, the output capacitance is 58 nF, and the reverse transmission capacitance is 11 NF. The reverse recovery time of the bulk diode is 150 ns; The simulation results all meet the design parameters of the device .2. combined with the machine capacity of the process line (such as corrosion method, lithography precision, etc.), the layout of the product is drawn. The process conditions were divided from material angle and Nbody implantation dose, and then the flow sheet was tested and analyzed. Comparing the test results with the design parameters, it is found that the static parameters and the dynamic full parameters basically meet the requirements, but the dynamic parameters allowance is small. Finally, the flow sheet is summarized to improve the chip characteristics. Complete the chip from sample to product quality leap to provide adequate data support.
【學(xué)位授予單位】:電子科技大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2015
【分類號(hào)】:TN386
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